CMP - United Business Media TechOnline
All Articles Products Courses Papers VirtuaLabs Webinars Web



 
LoginRegister
      TechOnline > Learning >  Technical Paper
Technical Papers
Optimizing FPGA Power with ISE Design Tools

Click to Download
pdf logo
Xcell Journal Article
279 KB (4 pages)
January 31, 2007
 

Subodh Gupta and Jason Anderson
Xilinx

In the more than twenty years since Xilinx invented the field programmable gate array (FPGA), research and development have produced dramatic improvements in FPGA speed and area efficiency, narrowing the gap between FPGAs and ASICs and making FPGAs the platform of choice for implementing digital circuits. Today, power consumption is a rising concern for FPGA vendors and their customers. Reducing the power of FPGAs is key to lowering packaging and cooling costs, improving device reliability, and opening the door to new markets, such as mobile electronics. This article illustrates the application of computer-aided design (CAD) techniques, such as those incorporated into Xilinx ISE, version 9.2i software, for effective power reduction.

 
Rate this paper
WORSE | BETTER
1 2 3 4 5

submit a paper

Xilinx
   

TECH PAPER
1. Use Rowley CrossWorks and the MAXQ3120 Evaluation Kit to Create a Light Meter Application

TECH PAPER
2. System ACE Configuration Solution for Xilinx FPGAs

TECH PAPER
3. Interface Products Design Guide

TECH PAPER
4. Maintaining Data/Clock Synchronization with Spread-Spectrum EMI Reduction