D.W. Hawkins
California Institute of Technology

This paper presents the trade-offs and technical challenges faced in the design of a high-performance data processing system. The paper discusses, using real-world examples, the partitioning of multi-gigahertz bandwidth data processing among multiple FPGAs, embedded CPUs/DSPs, and general purpose CPUs. The FPGAs handle the high-speed, parallel, custom bit-width signal-processing tasks, the embedded CPUs/DSPs handle integer, floating-point, averaging (high dynamic range), and FFT operations, and the general purpose CPUs handle data management and server-like operations. There is also an in-depth discussion of the signal-processing operations possible with FPGAs, including: correlation operations (multiply-accumulate), digital filtering, digital up-conversion and down-conversion, and the ability to build customized bit-width, and optimized signal-processing operations — the build-what-you-need advantage of FPGAs relative to their CPU and DSP counterparts.