CMP - United Business Media TechOnline
All Articles Products Courses Papers VirtuaLabs Webinars Web
 
LoginRegister
      TechOnline > Learning >  Technical Paper
Technical Papers
Virtex Variable-Input LUT Architecture

Click to Download
pdf logo
White Paper
 

Ralf Krueger and Brent Przybus
Xilinx

The variable-input look-up table (LUT) architecture has been a fundamental component of the Xilinx Virtex architecture first introduced in 1998. This unique architecture enables flexible implementation of any function with eight variable inputs, as well as implementation of more complex functions.

Note: By clicking on the above link, this paper will be emailed to your TechOnLine log-in address by Mentor Graphics.

 
Rate this paper
WORSE | BETTER
1 2 3 4 5

submit a paper
Follow Tech Papers

Mentor Graphics
Xilinx
   

WEBINAR
1. FPGAs: Enabling the Software Radio

COURSE
2. 1-D Wavelet Transform On FPGA

COURSE
3. A DSP/FPGA Based Processor for Real-Time Signal Processing

COURSE
4. A Novel Bus Arbiter