Paul Ekas and Brian Jentz
Altera

This article discusses the technical development and integration of FPGA coprocessors, including: profiling applications to identify high-load software algorithms suitable for off-loading to coprocessors, development of custom coprocessor blocks, viable-coprocessor system architectures, processor interface selection, hardware and software system integration, FPGA-coprocessor development systems, and cost and performance improvement attainable with FPGA coprocessors.

In addition, this article provides a design example for implementing an FPGA coprocessor for a TI DSP to increase performance and lower the cost of a modem system, and will highlight the methodology and application of FPGA coprocessors. This example assumes that software initially implemented the target system, therefore having no foresight into any optimal hardware/software partitioning.