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Mixed-Signal ASIC Top-Down and Bottom-Up Design Methodologies using VHDL-AMS

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Jean Oudinot, Caroline Vaganay, Michel Robbe, Patrick Radja
Mentor Graphics ,Anacad/Mentor Graphics and Matra Nortel Communications

The paper describes the process of top-down and bottom-up of a mixed-signal ASIC design using VHDL-AMS. The first part of the paper, introduced by Mr. Jean Oudinot, the top-dowm and bottom-up approaches supported by ADVance MS, a new Mixed-Signal simulation environment from Mentor Graphics (MGC). The second part is contributed by Mr. Michel Robbe and Mr. Patrick Radja from Matra Nortel Communications (MNC). They describe how they validated the new design methodologies with a demonstrator: a Single Conversion Receiver (superheterodyne). The process starts from system specification and simulation at the top-level abstraction all the way down to IC layout and verification. The simulation results of the system were compared successfully to the actual measurements.

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