Overview:
As multimedia applications proliferate within mobile handsets, designers are increasingly being pressured to increase memory capacity exponentially without increasing size or power consumption. A tough task indeed. As a result, flash memory has been at the forefront of handset development with NAND and NOR flash developers vying to be the center of a handset design, though they remain complementary—for now.
This competition has resulted in rapid moves from process node to process node in order to increase memory density, but no move has been as fast as Intel's move from its 90-nm M18 family to its recently announced 65-nm NOR flash. Occurring within the space of only a year—versus the typical two—the 1 Gbit device represents the cutting edge of memory technology and further distances the company from its closest competitor, Spansion..
View this On-Demand seminar to find out how Intel did it.
Use the seminar to see:
- The general structure of the IC and its parameters.
- SEM and TEM cross-section photos and descriptions of advanced process features.
- A comparative analysis between Intel and Spansion. .
- SEM and TEM cross-section photos and descriptions of the chip's advanced process features.
- And much more!
Who should attend:
Designers of SoCs and memory ICs at nodes of 90 nm and below that require insight into leading-edge process technologies and their characteristics..
Presenter:
Geoffrey MacGillivray
(geoffrey@semiconductor.com), technology manager for memory at Semiconductor Insights Inc.
(www.semiconductor.com).
Please contact TechOnline's Webinar Support with any questions.
Email: tolwebinar@cmp.com.
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