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DESCRIPTION
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The
RapidIO interconnect architecture, announced in February
2000, provides a new, high-performance interconnect for
board-to-board and chip-to-chip communications within embedded
computer systems. Targeted for an initial
bandwidth in excess of 1 Gigabyte per second per device pair,
RapidIO provides the data bandwidth required for increasingly
complex applications running on ever faster processors, and
requiring ever more data to move between multiple processing
stages.RapidIO is initially targeted at embedded applications with
the highest data communication requirements, such as networking,
wireless communication infrastructure, digital video broadcasting,
medical diagnostic imaging, military image and signal processing,
and semiconductor wafer inspection. The specification will be
controlled by the RapidIO Trade Association, making the RapidIO
architecture the only open standard to directly address the
intra-system interconnect requirements for all of these
markets.
Keywords: OSEE, online
symposium for electrical engineers
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