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DESCRIPTION
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to begin the Lecture. |
An overview of
popular DSP processors, comparing some essential features and
benefits of each with future chip directions for memory and
interprocessor communication. In addition, ways to improve data
transfer rates within the system to offload the backplane bus,
including VIM mezzanines, FPDP and RACEway, to give DSPs access to
the data they need. How to use Benchmark's
effectively, factors that effect the usefulness of benchmarks and
independent resources for chip benchmarks will be given. Real-life
application examples will be discussed for a direction finding
system showing the versatility of RACEway routing. Flexibility in
freely assigning data sources to DSP's without building new cables
or adding new connectors is a major benefit of this methodology of
system architecture. Another application example for a signal
intelligence application will be discussed showing the use of VIM
mezzanines, FPDP, and RACEway to meet the needs of this system.
Supporting software including host to target communication and
C-callable library functions will also be discussed.
Keywords: OSEE, online
symposium for electrical engineers
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