|
DESCRIPTION
| Click here |
 |
to begin the Lecture. |
This paper
presents a new very fast adder for double-precision mantissas (IEEE
754-floating point standard) realized using 0.6mm CMOS Austria
Mikro Systeme (AMS) Standard Cells. The new
addition circuit is characterized by a worst-case delay of about
3.81ns, a layout area of 634000mm² and a maximum power
dissipation of about 112mW at 40MHz operating frequency.
Keywords: OSEE, online
symposium for electrical engineers
| 
