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On-Demand Webinar |
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| Improve Process Reliability with ASUR Parallel and Single Site Measurement |
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Abstract:
Reliability has always been a challenge in integrated circuit technologies as feature sizes shrink from generation to generation leading to increased voltage, current and thermal stresses along with increased sensitivity to processing defects. This trend has been exacerbated with the need to introduce new materials into the process to enable the pursuit of ever higher performance and packing densities. These new materials, including high k gate dielectrics, low k inter-level dielectrics and copper metallization, present new challenges after 30+ years of familiarity with aluminum and silicon dioxide. To meet this challenge, Core Wafer Systems, Inc. in cooperation with Agilent Technologies, Inc. are bringing new fast wafer level and parallel level measurement techniques for use on a wide range of Agilent test equipment, along with sophisticated data analysis with the ASUR suite of software.
In this continued series, we will briefly describe the ASUR product line (SDR - single site wafer level reliability; PDR - multi site wafer or package level reliability; RDA - reliability data analysis) with a more detailed focus on recent enhancements to each of the tools. This will be followed by discussion of techniques to mitigate annealing effects in Bias Temperature Instability (BTI) measurements, recent correlation data between parametric tester PDQ-WLR based measurements and ASUR SDR and PDR measurements and a discussion of how to analyze defective via data in wafer-level electromigration measurements.
Giveaway:
Registrants who complete the feedback form will be entered in a drawing to win one of two $75 Amazon.com gift certificates.
Presenter:
Donald G. Pierce
Donald G. Pierce received the B.S., M.S. and Ph.D. in Physics from Rensselaer Polytechnic Institute. During much of the '80's he was an Associate at Booz, Allen & Hamilton where he conducted research on electrical overstress effects on semiconductor devices, including electrostatic discharge. Dr. Pierce was then employed as a Senior Member of the Technical Staff at Sandia National Laboratories' Reliability Physics Department where his research focus was on electromigration in metal interconnects and techniques for establishing the overall reliability of microelectronics. Dr. Pierce was President and a founder of Sandia Technologies Inc., which provided wafer level reliability techniques to world-wide industry in partnership with Agilent Technologies. He is currently Vice President of Core Wafer Systems, Inc. which expands that partnership with Agilent Technologies into parallel wafer level and packaged part reliability testing. He is a senior member of the IEEE, Honorary Life Member and past-President of the Electrostatic Discharge Association, a past-General Chair of the EOS/ESD Symposium and was the U.S. editor of the journal Microelectronics Reliability.
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| Agilent Technologies, the premier measurement company, delivers innovative technologies, solutions and services to a wide range of customers in communications, electronics, life sciences and chemical analysis. The breadth and depth of our expertise enable us to offer solutions across our customers' entire product life cycle from research and development to manufacturing to installation and management. With insight gained from this unique and comprehensive perspective, we can help our customers get the best products and services to market quickly and profitably. |
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