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  Reducing IC Cycle Time with Calibre   Mathew Hogan
Mentor Graphics
  Jul 28, 2008
Mentor Graphics Technical Library
  Model-Driven Design for Six Sigma   Darrell Teegarden
Mentor Graphics
  Jul 25, 2008
Mentor Graphics Technical Library
  Nucleus Multimedia Framework and the OpenMax IL Standard   Sheikh Muhammad Mustafa and Fakhir Ahmet Ansari
Mentor Graphics
  Jul 14, 2008
Mentor Graphics Technical Library
  The New Wave in Functional Verification: Intelligent Testbench Automation   Mark Olen
Mentor Graphics
  Jul 2008
Mentor Graphics Technical Library
  Designing and Implementing Architectures for Distributed Automotive E/E Systems   Thomas Heurung and Stefan Walz
Mentor Graphics
  Jul 08, 2008
Mentor Graphics Technical Library
  Advanced Algorithmic Evaluation for Imaging, Communication and Audio Applications   Toshiba   Jul 07, 2008
Mentor Graphics Technical Library
  Intelligent Testbench Automation Turbo-Charges Simulation   Mark Olen
Mentor Graphics
  Jun 25, 2008
Mentor Graphics Technical Library
  Avoid FPGA Project Delays by Adopting Advanced Design Methodologies   Alex Vals
Mentor Graphics
  Jun 25, 2008
Mentor Graphics Technical Library
  Firmware Driven OVM Testbench   Jim Kenney
Mentor Graphics
  Jun 25, 2008
Mentor Graphics Technical Library
  Intelligent Testbench Automation—Now a Reality, No Longer Just a Promise   Jay O'Donnell
Mentor Graphics
  Jun 25, 2008
Mentor Graphics Technical Library
  Inflexion Platform Multimedia Feature Pack Achieving Rapid Deployment of Multimedia Capabilities into Today's Consumer Electronic Products   Fakhir Ahmed Ansari
Mentor Graphics
  Jun 23, 2008
Mentor Graphics Technical Library
  Nucleus RTP/RTSP Streaming Rich Multimedia Content Across IP Networks   Fakhir Ahmed Ansari
Mentor Graphics
  Jun 2008
Mentor Graphics Technical Library
  Exploiting Virtual Memory   Todd Brian and Larina D'Souza
Mentor Graphics
  Jun 23, 2008
Mentor Graphics Technical Library
  Implementing SystemVerilog for FPGA Design   Ehab Mohsen
Mentor Graphics
  May 29, 2008
Mentor Graphics Technical Library
  Combining Compression with Fewer Pins Dramatically Saves I/O During Multi-Site Test   Ron Press
Mentor Graphics
  May 08, 2008
Mentor Graphics Technical Library
  Hardware-Assisted Verification for Efficient Validation of Multi-Processor Based Designs   Richard Pugh and Hans Multhaup
Mentor Graphics
  May 07, 2008
Mentor Graphics Technical Library
  Managing Timing Constraints with Precision Synthesis   Ehab Mohsen
Mentor Graphics
  May 02, 2008
Mentor Graphics Technical Library
  Developing Automotive Products Using the EAST-ADL2, an AUTOSAR Compliant Architecture Description Language   P. Cuenot et al.
Siemens VDO Automotive SAS, ETAS GmbH, Volvo Technology, CEA LIST, Technical University of Berlin, Royal Institute of Technology, and Mentor Graphics
  Apr 23, 2008
Mentor Graphics Technical Library
  The CHIPit UMRBus Communication System Opens New Ways of Design Verification   Rajkumar Methuku and Markus Karg
ProDesign Electronics
  Apr 17, 2008
Mentor Graphics Technical Library
  CAN Bus Signal Integrity Design   Mike Donnelly
Mentor Graphics
  Apr 17, 2008
Mentor Graphics Technical Library
  Highly Reliable Detection and Correction of Pinched Areas for High Transmission Phase Shift Mask   Chih Li Chen et al.
NANYA Technology and Mentor Graphics
  Apr 14, 2008
Mentor Graphics Technical Library
  SEM-Contour Based Mask Modeling   Jim Vasek et al.
Freescale Semiconductor, Applied Materials, and Mentor Graphics
  Apr 14, 2008
Mentor Graphics Technical Library
  Fitness and Runtime Correlation of Compact Model Complexity   Alexander N. Drozdov et al.
Mentor Graphics
  Apr 14, 2008
Mentor Graphics Technical Library
  Novel Method for Optimizing Lithography Exposure Conditions Using Full-Chip Post-OPC Simulation   John Sturtevant et al.
Mentor Graphics
  Apr 14, 2008
Mentor Graphics Technical Library
  Coupled-Dipole Modelling for 3D Mask Simulation   Vlad Temchenko et al.
Mentor Graphics and Infineon
  Apr 14, 2008
Mentor Graphics Technical Library
  Optimized OPC Approach for Process Window Improvement   Ching-HengWang et al.
SMIC and Mentor Graphics
  Apr 14, 2008
Mentor Graphics Technical Library
  OPC Model Calibration Considerations for Data Variance   Mohamed Bahnas and Mohamed Al-Imam
Mentor Graphics
  Apr 14, 2008
Mentor Graphics Technical Library
  Exposure Tool Specific Post-OPC Verification   John Sturtevant et al.
Mentor Graphics
  Apr 14, 2008
Mentor Graphics Technical Library
  A Novel Methodology for Model-Based OPC Verification   TengYen Huang et al.
Nanya and Mentor Graphics
  Apr 14, 2008
Mentor Graphics Technical Library
  Implementing a Framework to Generate a Unified OPC Database from Different EDA Vendors for 45nm and Beyond   Shady Abdel Wahed et al.
Mentor Graphics and United Microelectronics
  Apr 14, 2008
Mentor Graphics Technical Library
  Layout Verification in the Era of Process Uncertainty: Target Process Variability Bands vs. Actual Process Variability Bands   J. Andres Torres
Mentor Graphics
  Apr 14, 2008
Mentor Graphics Technical Library
  The Use of EUV Lithography to Produce Demonstration Devices   Bruno La Fontaine et al.
Mentor Graphics, AMD, IBM, Toshiba, and ASML
  Apr 14, 2008
Mentor Graphics Technical Library
  Advanced Mask Process Modeling for 45-nm and 32-nm Nodes   Edita Tejnil et al.
Mentor Graphics and SMIC
  Apr 14, 2008
Mentor Graphics Technical Library
  Advanced Debug Methods for DSM Driven Testbenches   Jim Kenney
Mentor Graphics
  Apr 2008
ARM IQ Article
  Designing RF, Analog and Digital on PCB   John Isaac
Mentor Graphics
  Mar 28, 2008
Mentor Graphics Technical Library
  Preserving Freedom of Choice When Designing FPGAs   Ehab Mohsen
Mentor Graphics
  Mar 28, 2008
Mentor Graphics Technical Library
  The Use of Advanced Verification Methods to Address DO-254 Design Assurance   James P. Keithan et al.
Mentor Graphics and XtremeEDA
  Mar 20, 2008
Mentor Graphics Technical Library
  Achieving Quality and Traceability in FPGA/ASIC Flows for DO-254 Aviation Projects   Michelle Lange and Tom Dewey
Mentor Graphics
  Mar 20, 2008
Mentor Graphics Technical Library
  Demystifying DO-254   Tom Dewey
Mentor Graphics
  Feb 29, 2008
Mentor Graphics Technical Library
  Real Incremental Design for FPGAs   Rakesh Jain
Mentor Graphics
  Feb 28, 2008
Mentor Graphics Technical Library
  Implementing DDR3 DIMMs with Modern FPGAs   Altera   Feb 28, 2008
Mentor Graphics Technical Library
  Object Action Language Reference Manual   Mentor Graphics   Feb 05, 2008
Mentor Graphics Technical Library
  High Quality Test Solutions for Secure Applications   Mentor Graphics   Feb 05, 2008
Mentor Graphics Technical Library
  Managing Precious FPGA Resources   Darren Zacher
Mentor Graphics
  Jan 31, 2008
Mentor Graphics Technical Library
  Reducing Physical Verification Cycle Time   John Ferguson
Mentor Graphics
  Jan 04, 2008
Mentor Graphics Technical Library
  Scatter/Gather DMAs for PCI Express-Enabled Embedded Systems   Lattice Semiconductor   Jan 03, 2008
Mentor Graphics Technical Library
  Automating Clock-Domain Crossing Verification for Do-254 (and Other Safety-Critical) Designs   Michelle Lange
Mentor Graphics
  Dec 17, 2007
Mentor Graphics Technical Library
  Getting Started in HDI Fabrication   Happy Holden
Mentor Graphics
  Dec 12, 2007
Mentor Graphics Technical Library
  Passing the Test   Happy Holden
Mentor Graphics
  Dec 12, 2007
Mentor Graphics Technical Library
  PCIe — A Technology-Laden Communications Interface for the Future   C.C. Hung
Mentor Graphics
  Dec 11, 2007
Mentor Graphics Technical Library
  Supporting CPRI-Based Distributed Architectures with Cost Optimized FPGAs   Lattice Semiconductor   Nov 30, 2007
Mentor Graphics Technical Library
  Using High-Level Synthesis for FPGA Development   Tomonori Yamashita et al.
Mentor Graphics
  Nov 29, 2007
Mentor Graphics Technical Library
  Hardware/Software Validation with a TLM Virtual System Prototype   Alon Wintergreen and Rami Rachamim
Mentor Graphics
  Nov 29, 2007
Mentor Graphics Technical Library
  Bottom-Up Design Flow Using Precision Synthesis   Shantuna Kamat
Mentor Graphics
  Nov 28, 2007
Mentor Graphics Technical Library
  Minimizing the Cost of Using Free Processor IP   Darren Zacher
Mentor Graphics
  Nov 02, 2007
Mentor Graphics Technical Library
  Closing the Loop in Testbench Automation   Mark Olen
Mentor Graphics
  Oct 29, 2007
Mentor Graphics Technical Library
  Applying Assertion-Based Formal Verification to Verification Hot Spots   Ping Yeung and Sundaram Subramanian
Mentor Grapics
  Oct 25, 2007
Mentor Graphics Technical Library
  A Comparison of Metastability Modeling Methods   Chris Kwok and Roger Sabbagh
Mentor Graphics
  Oct 24, 2007
Mentor Graphics Technical Library
  Introduction to Algorithmic Test Generation   Cliff Lyons and Mark Olen
Mentor Graphics
  Oct 15, 2007
Mentor Graphics Technical Library
  DO-254 Compliant Design and Verification with VHDL-AMS   Darrell Teegarden
Mentor Graphics
  Oct 12, 2007
Mentor Graphics Technical Library
  Designing High Performance DSP Hardware Using Catapult C Synthesis and the Altera Accelerated Libraries   Mike Fingeroff and Thiagaraja Gopalsamy
Mentor Graphics and Altera
  Oct 10, 2007
Mentor Graphics Technical Library
  The Next Generation of Embedded Test Compression: TestKompress Xpress Compactor   Mentor Graphics   Sep 28, 2007
Mentor Graphics Technical Library
  Nucleus SNMP   Mentor Graphics   Sep 27, 2007
Mentor Graphics Technical Library
  Physically Aware Synthesis in Precision RTL Plus   Nan-Chi Chou and Pei-Ning Guo
Mentor Graphics
  Sep 2007
Mentor Graphics Technical Library
  Leveraging FPGA in PCB System Designs: Optimizing Profit Margin   Dave Brady
Mentor Graphics
  Sep 19, 2007
Mentor Graphics Technical Library
  Low Power Design and Verification Techniques   Stephen Bailey et al.
Mentor Graphics
  Sep 13, 2007
Mentor Graphics Technical Library
  Maximizing Performance and Reliability of FSMs with Precision Synthesis   Ron Plyler
Mentor Graphics
  Sep 05, 2007
Mentor Graphics Technical Library
  Logical and Physical Design Reuse   Todd Hendren
Mentor Graphics
  Aug 28, 2007
Mentor Graphics Technical Library
  Homogenous HW/SW Debug Simplifies Adoption of Processor-Driven Tests   Jim Kenney
Mentor Graphics
  Aug 2007
ARM IQ Article
  User Interface Development for Embedded Systems   Colin Walls and Geoff Kendall
Mentor Graphics
  Aug 2007
Mentor Graphics Technical Library
  Effective Functional Verification Methodologies for DO-254 Level A/B and Other Safety-Critical Devices   Michelle Lange and T.J. Boer
Mentor Graphics
  Aug 21, 2007
Mentor Graphics Technical Library
  Rules-Based Code Generation   Keith Brown
Mentor Graphics
  Aug 17, 2007
Mentor Graphics Technical Library
  Experimental Jitter Analysis in a FlexCAN-based Drive-by-Wire Automotive Application   Jason Paskvan
Mentor Graphics
  Aug 16, 2007
Mentor Graphics Technical Library
  Planning Formal Verification Closure   Harry Foster and Ping Yeung
Mentor Graphics
  Aug 16, 2007
Mentor Graphics Technical Library
  DO-254: Understanding the Issues That Impact Business   Mentor Graphics, TNI-Software, DO-254 User's Group, and HighRely   Aug 03, 2007
Mentor Graphics Technical Library
  SVA Local Variable Coding Guidelines for Efficient Use   Jian Long et al.
Mentor Graphics
  Aug 02, 2007
Mentor Graphics Technical Library
  Requirements Tracing   Cort Starrett
Mentor Graphics
  Aug 02, 2007
Mentor Graphics Technical Library
  Embedded Passives — Tradeoffs and Efficient Design Solutions   Happy Holden and Per Viklund
Mentor Graphics
  Jul 31, 2007
Mentor Graphics Technical Library
  Topology Planning and Routing — Combining the Expertise of the Designer with Auto-routing Speed   John Isaac
Mentor Graphics
  Jul 31, 2007
Mentor Graphics Technical Library
  HDI Layer Stackups for Large Dense PCBs   Mentor Graphics   Jul 30, 2007
Mentor Graphics Technical Library
  An Integrated Tool Flow Supporting FPGA Prototyping and Debug   Brian Bailey and Ehab Mohsen
Mentor Graphics
  Jul 27, 2007
Mentor Graphics Technical Library
  Implementation Quality Prototyping Using Pinnacle   Mentor Graphics   Jul 24, 2007
Mentor Graphics Technical Library
  Confronting Chip Assembly Challenges   Sudhakar Jilla
Mentor Graphics
  Jul 24, 2007
Mentor Graphics Technical Library
  Design for Variability   Sudhakar Jilla
Mentor Graphics
  Jul 24, 2007
Mentor Graphics Technical Library
  Accelerating Wire Harness Development for Off-Highway Vehicles   Nice Price
Mentor Graphics
  Jul 20, 2007
Mentor Graphics Technical Library
  Verification Management: Major Challenges   Darron May
Mentor Graphics
  Jul 12, 2007
Mentor Graphics Technical Library
  The Streamlined Design Flow from Catapult C to Precision RTL Synthesis   Ron Plyler
Mentor Graphics
  Jul 03, 2007
Mentor Graphics Technical Library
  Low-Cost Connections to High-Speed Serial Devices   Bob Blake
Mentor Graphics
  Jul 03, 2007
Mentor Graphics Technical Library
  Nucleus OS - Accelerating Encryption on the PowerPC 8349E   Todd Brian
Mentor Graphics
  Jun 27, 2007
Mentor Graphics Technical Library
  Solving the Verification IP Re-Use Paradox: How to Re-Use Module Level Testbenches at the System Level   Mark Olen
Mentor Graphics
  Jun 26, 2007
Mentor Graphics Technical Library
  Combining ModelSim and Simulink in an Integrated Simulation Environment   Scott Cooper
Mentor Graphics
  Jun 26, 2007
Mentor Graphics Technical Library
  Addressing Today's Complex Clock Modeling Issues with Veloce Emulation Technology   Mentor Graphics   Jun 19, 2007
Mentor Graphics Technical Library
  Considerations for Effective Implementation of Processor-Driven Testbenches   Jim Kenney
Mentor Graphics
  Jun 15, 2007
Mentor Graphics Technical Library
  Using Strong Types in Your SystemVerilog Design and Verification   Mentor Graphics   Jun 14, 2007
Mentor Graphics Technical Library
  Enabling DaVinci Technology with Mentor Software   Mentor Graphics   Jun 13, 2007
Mentor Graphics Technical Library
  Using Precision Synthesis and MicroBlaze Embedded IP   Darren Zacher
Mentor Graphics
  Jun 13, 2007
Mentor Graphics Technical Library
  Fundamentals of PCB Manufacturing   Mark Laing
Mentor Graphics
  Jun 11, 2007
Mentor Graphics Technical Library
  Cortex-M1: A Powerful Solution for FPGAs   Mike Thompson
Mentor Graphics
  May 31, 2007
Mentor Graphics Technical Library
  Integrating HDL Designer Series and FormalPro Tools   Don Waldoch
Mentor Graphics
  May 24, 2007
Mentor Graphics Technical Library
  Embedded Optical Proximity Correction for the Sigma7500 DUV Mask Writer   Anders Österberg et al.
Micronic Laser Systems and Mentor Graphics
  May 11, 2007
Mentor Graphics Technical Paper Library
  Automated Aerial Image-Based CD Metrology Initiated by Pattern Marking with Photomask Layout Data   Grant Davis et al.
Mentor Graphics, Samsung Electronics, and Carl Zeiss
  May 11, 2007
Mentor Graphics Technical Paper Library
  STMicroelectronics Design Platform for Micro and Nano Technologies Based on Mentor Graphics IC Flow   Iyad Rayane and Vincent Ruet
STMicroelectronics
  May 01, 2007
Mentor Graphics Technical Paper Library
  Using Mentor Graphics Automated Routing Tools in an Analog Layout Flow   Collin Weiss
Legerity
  May 01, 2007
Mentor Graphics Technical Paper Library
  Equivalence Checking for FPGA Design   Jim Henson
Mentor Graphics
  Apr 20, 2007
Mentor Graphics Technical Library
  Tips for FPGA Timing Closure   Troy Scott and Tim Schnettler
Mentor Graphics
  Apr 20, 2007
Mentor Graphics Technical Library
  Designing PCBs with High-Speed Constraints: Developing constraints   Patrick Carrier
Mentor Graphics
  Apr 18, 2007
Mentor Graphics Technical Library
  The Target Platform Methodology for HW/SW Debugging Before Silicon   Maryse Wouters, IMEC
Mentor Graphics
  Apr 16, 2007
Mentor Graphics Technical Library
  Designing an RF System-In-Package with Improved IC Design Environment   Mathieu Behaghel
STMicroelectronics
  Apr 16, 2007
Mentor Graphics Technical Library
  ASIC Prototyping with FPGAs   Ahmed Nabil and Darren Zacher
Mentor Graphics
  Mar 28, 2007
Mentor Graphics Technical Paper Library
  Requirements for a True Mixed-Level TLM-RTL Design Environment   Bill Chown
Mentor Graphics
  Mar 27, 2007
Mentor Graphics Technical Library
  The Integrated IP Subsystem: A Converging SoC Solution   Cary Snyder
Mentor Graphics
  Mar 26, 2007
Mentor Graphics Technical Library
  A Systematic Approach for Capturing Interconnects Hot Spots   Te Hung Wu et al.
Mentor Graphics and United Microelectronics
  Mar 22, 2007
Mentor Graphics Technical Library
  Real-time VT5 Model Coverage Calculations During OPC Simulations   Ioana Graur et al.
Mentor Graphics and IBM
  Mar 22, 2007
Mentor Graphics Technical Library
  Understanding the Impact of Rigorous Mask Effects in the Presence of Empirical Process Models Used in Optical Proximity Correction (OPC)   Michael C. Lam and Konstantinos Adam
Mentor Graphics
  Mar 22, 2007
Mentor Graphics Technical Library
  SEM-Contour Based OPC Model Calibration through the Process Window   Jim Vasek et al.
Mentor Graphics, Freescale Semiconductor, and Applied Materials
  Mar 22, 2007
Mentor Graphics Technical Library
  Automatic OPC Mask Shape Repair   James Word et al.
Mentor Graphics
  Mar 21, 2007
Mentor Graphics Technical Paper Library
  Advances in Compute Hardware Platforms for Computational Lithography   Tom Kingsley et al.
Mentor Graphics and Mercury Computer Corporation
  Mar 21, 2007
Mentor Graphics Technical Library
  Taking Image Quality Factor Into the OPC Model Tuning Flow   Ching-Heng Wang et al.
Mentor Graphics and Semiconductor Manufacturing International Corporation
  Mar 21, 2007
Mentor Graphics Technical Library
  Silicon Verification of Flare Model & Application to Real Chip for Long Range Proximity Correction   Dongqing Zhang et al.
Mentor Graphics and Chartered Semiconductor Manufacturing
  Mar 21, 2007
Mentor Graphics Technical Library
  SEM Based Data Extraction for Model Calibration   Mohamed Al-Imam et al.
Mentor Graphics and United Microelectronics
  Mar 21, 2007
Mentor Graphics Technical Library
  Optimizing Gate Layer OPC Correction and SRAF Placement for Maximum Design Manufacturability   Travis Brist et al.
Mentor Graphics
  Mar 21, 2007
Mentor Graphics Technical Library
  More on Accelerating Physical Verification Using STPRL: a Novel Language for Test Pattern Generation   Ahmed Nouh
Mentor Graphics
  Mar 21, 2007
Mentor Graphics Technical Library
  Mask-friendly OPC for a Reduced Mask Cost and Writing Time   Ayman Yehia
Mentor Graphics
  Mar 21, 2007
Mentor Graphics Technical Library
  Litho Aware Method for Circuit Timing/Power Analysis Through Process   R. S. Fathy et al.
Mentor Graphics
  Mar 21, 2007
Mentor Graphics Technical Library
  Unified Process-Aware System for Circuit Layout Verification   J. Andres Torres and Fedor G. Pikus
Mentor Graphics
  Mar 21, 2007
Mentor Graphics Technical Library
  Feedback Flow to improve Model Based OPC Calibration Test Pattern   Walid A. Tawfic et al.
Mentor Graphics
  Mar 21, 2007
Mentor Graphics Technical Library
  Saving Time with Analog Simulation   Sherwin Davenport
Mentor Graphics
  Mar 09, 2007
Mentor Graphics Technical Library
  Scoring with HDL Designer   Tom Dewey
Mentor Graphics
  Mar 02, 2007
Mentor Graphics Technical Library
  Stratix III Programmable Power   Altera
Mentor Graphics
  Mar 01, 2007
Mentor Graphics Technical Library
  Improving Automotive EE Design with SystemVision   Darrell Teegarden
Mentor Graphics
  Feb 28, 2007
Mentor Graphics Technical Library
  The Second Productivity Revolution—Intelligent Testbench Automation   Mark Olen and Jay O'Donnell
Mentor Graphics
  Feb 26, 2007
Mentor Graphics Technical Library
  Three Embedded Software Techniques   David Kittinger
Mentor Graphics
  Feb 21, 2007
Mentor Graphics Technical Library
  Emerging Embedded Technology in the Automotive Industry   Saad Naveed
Mentor Graphics
  Feb 21, 2007
Mentor Graphics Technical Library
  Five Steps to Quality CDC Verification   Ping Yeung, Ph.D.
Mentor Graphics
  Feb 19, 2007
Mentor Graphics Technical Library