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Title	Author/Company	Published
Realizing ESL with Scalable Transaction Level Models	Mentor Graphics	Feb 25, 2010 Mentor Graphics Technical Library
Multi-Voltage Design Flow with Olympus-SoC	Mentor Graphics	Feb 22, 2010 Mentor Graphics Technical Library
Combining Low Pin Count Test with Scan Compression Dramatically Reduces Test Interface and Cost	Mentor Graphics	Jan 29, 2010 Mentor Graphics Technical Library
Simulating Vector Controlled Induction Motors Using Space Vector Modulation	Mentor Graphics	Jan 27, 2010 Mentor Graphics Technical Library
SystemC Modeling Synthesis and Verification in Catapult C	Mentor Graphics	Jan 21, 2010 Mentor Graphics Technical Library
Using HDL Designer to Facilitate DO-254 Compliant and Safety-Critical Design Processes	Mentor Graphics	Jan 13, 2010 Mentor Graphics Technical Library
Advanced Floorplanning with Olympus-SoC	Mentor Graphics	Jan 11, 2010 Mentor Graphics Technical Library
Hierarchical DPT Mask Planning For Contact Layer	Mentor Graphics	Jan 08, 2010 Mentor Graphics Technical Library
Comprehensive Hierarchical DFT for System-On-chip Devices, Tessent SoCScan Technology Backgrounder	Mentor Graphics	Jan 07, 2010 Mentor Graphics Technical Library
How to Rapidly Create and Customize Compelling GUIs for Android-Based Devices	Mentor Graphics	Jan 07, 2010 Mentor Graphics Technical Library
Automated DRC Waiver Management (or, How I Learned to Stop Worrying About IP Waivers and Love Calibre Auto-Waiver)	Mentor Graphics	Jan 06, 2010 Mentor Graphics Technical Library
The Pivot Point for Design Flow Improvements	Mentor Graphics	Dec 23, 2009 Mentor Graphics Technical Library
Why Use Embedded Test for High-Speed Serial I/Os?	Mentor Graphics	Dec 18, 2009 Mentor Graphics Technical Library
AUTOSAR and FlexRay: A Tale of Two Standards	Mentor Graphics	Dec 18, 2009 Mentor Graphics Technical Library
Boosting RTL Verification with High-Level Synthesis	Mentor Graphics	Dec 15, 2009 Mentor Graphics Technical Library
New Tools Answer Old Issues in Wiring Harness Design	Mentor Graphics	Dec 11, 2009 Mentor Graphics Technical Library
The Aerospace Industry Takes a Fresh Look at Its Wire Harness Design Approach	Mentor Graphics	Nov 23, 2009 Mentor Graphics Technical Library
Making the Most of Electrical Simulation in the MCAD/PLM World	Mentor Graphics	Nov 23, 2009 Mentor Graphics Technical Library
Taking wiring design to the next level	Mentor Graphics	Nov 23, 2009 Mentor Graphics Technical Library
Mechatronic System Integration and Design	Mentor Graphics	Nov 23, 2009 Mentor Graphics Technical Library
Evolving the Coverage-Driven Verification Flow	Mentor Graphics	Nov 2009 Mentor Graphics Technical Library
Simulation Provides Key to Explosive Automotive Design Challenges	Mentor Graphics	Nov 23, 2009 Mentor Graphics Technical Library
Keep Your FPGA Options Open With Vendor-Independent IP	Mentor Graphics	Nov 20, 2009 Mentor Graphics Technical Library
Static and Formal Verification of Power Aware Designs at the RTL Using UPF	Mentor Graphics	Nov 16, 2009 Mentor Graphics Technical Library
Developing a Complete Critical Feature Analysis Solution—Part 5: Generating Benchmark CFA Data	Mentor Graphics	Oct 28, 2009 Mentor Graphics Technical Library
Developing a Complete Critical Feature Analysis Solution—Part 4: Recommended Rule Weighting	Mentor Graphics	Oct 28, 2009 Mentor Graphics Technical Library
Developing a Complete Critical Feature Analysis Solution—Part 3: Parameter Weightings for CFA Metrics	Mentor Graphics	Oct 28, 2009 Mentor Graphics Technical Library
Developing a Complete Critical Feature Analysis Solution—Part 2: Defining CFA Metrics	Mentor Graphics	Oct 28, 2009 Mentor Graphics Technical Library
Faster Time to Root Cause with Diagnosis-Driven Yield Analysis	Mentor Graphics	Oct 28, 2009 Mentor Graphics Technical Library
Developing a Complete Critical Feature Analysis Solution—Part 1: What Is CFA and Why Do I Need It?	Mentor Graphics	Oct 28, 2009 Mentor Graphics Technical Library
Accelerated Verification of a MATLAB-Driven Digital FIR Filter RTL Design Using Veloce and TBX	Mentor Graphics	Oct 22, 2009 Mentor Graphics Technical Library
Using ReqTracer to Facilitate a Requirements-Driven DO-254 Compliant Design	Mentor Graphics	Oct 22, 2009 Mentor Graphics Technical Library
A User-programmable Link between Data Preparation and Mask Manufacturing Equipment	Mentor Graphics	Oct 14, 2009 Mentor Graphics Technical Library
pRSM: Models for Model-Based Litho-Hotspot Repairs	Mentor Graphics	Oct 14, 2009 Mentor Graphics Technical Library
RTL and Synthesis Design Approach to Radiation-Harden and Fail-Safe Targeted Applications	Mentor Graphics	Oct 14, 2009 Mentor Graphics Technical Library
BGA Breakouts and Routing	Mentor Graphics	Oct 14, 2009 Mentor Graphics Technical Library
SRAF Enhancement using Inverse Lithography for 32 nm Hole Patterning and Beyond	Mentor Graphics	Oct 14, 2009 Mentor Graphics Technical Library
Introducing Process Variability Score for Process Window OPC Optimization	Mentor Graphics	Oct 14, 2009 Mentor Graphics Technical Library
Challenges for the 28nm half node: Is the optical shrink dead?	Mentor Graphics	Oct 14, 2009 Mentor Graphics Technical Library
Model-Based Hints for Litho-Hotspots Repair	Mentor Graphics	Oct 14, 2009 Mentor Graphics Technical Library
Deployment of OASIS.MASK (P44) as Direct Input for Mask Inspection of Advanced Photomasks	Mentor Graphics	Oct 14, 2009 Mentor Graphics Technical Library
Adaptive OPC Approach Based on Image Simulation	Mentor Graphics	Oct 14, 2009 Mentor Graphics Technical Library
Diagnosing CDC Errors in FPGAs	Mentor Graphics	Oct 06, 2009 Mentor Graphics Technical Library
Restrictive Design Rules and Their Impact on 22 nm Design and Physical Verification	Mentor Graphics	Sep 28, 2009 Mentor Graphics Technical Library
Automated DRC Violation Waiver Management for IP Block Integration	Mentor Graphics	Sep 28, 2009 Mentor Graphics Technical Library
Fast, Robust S-parameter Modeling in HyperLynx GHz	Mentor Graphics	Sep 17, 2009 Mentor Graphics Technical Library
FGPA Design and Verification in Mechatronic Applications	Mentor Graphics	Sep 17, 2009 Mentor Graphics Technical Library
Getting Started with Android Development for Embedded Systems	Mentor Graphics	Sep 09, 2009 Mentor Graphics Technical Library
How Multicore Enables the Fast and Efficient Deployment of Multi-OS Systems	Mentor Graphics	Sep 09, 2009 Mentor Graphics Technical Library
CFD for Mechanical Design Engineers—"A Paradigm Shift for Better Design"	Mentor Graphics	Sep 09, 2009 Mentor Graphics Technical Library
Understanding Formal Methods for Use in DO-254 Programs	Mentor Graphics	Aug 24, 2009 Mentor Graphics Technical Library
Accurate Multi-GBPS Serial Channel Design Solutions for the Entire Design Team	Mentor Graphics	Aug 20, 2009 Mentor Graphics Technical Library
Efficient Design-Specific Worst-Case Corner Extraction for Integrated Circuits	Mentor Graphics	Aug 18, 2009 Mentor Graphics Technical Library
Memory Repair Primer: A guide	Mentor Graphics	Aug 18, 2009 Mentor Graphics Technical Library
BIST Techniques for Delay and Jitter	Mentor Graphics	Aug 18, 2009 Mentor Graphics Technical Library
Why Use Embedded Test for High-Speed Serial I/Os?	Mentor Graphics	Aug 18, 2009 Mentor Graphics Technical Library
Noise Insensitive Digital BIST	Mentor Graphics	Aug 18, 2009 Mentor Graphics Technical Library
The Design and Verification Challenge for the Next Decade	Mentor Graphics	Aug 12, 2009 Mentor Graphics Technical Library
Effective Embedded Differentiation with Graphical User Interfaces	Mentor Graphics	Aug 06, 2009 Mentor Graphics Technical Library
The Promise of M2M: How Pervasive Connected Machines Are Fueling the Next Wireless Revolution	Mentor Graphics	Jul 30, 2009 Mentor Graphics Technical Library
Fluid Dynamics Simulation Keeps Aerospace Design Costs Trim	Mentor Graphics	Jul 28, 2009 Mentor Graphics Technical Library
Synthesis for DO-254 Design Assurance and other Safety-Critical Design Processes	Mentor Graphics	Jul 27, 2009 Mentor Graphics Technical Library
Model-based Instruction Stream Generation for Processor Verification	Mentor Graphics	Jul 09, 2009 Mentor Graphics Technical Library
Energy Efficient Laboratory Design	Mentor Graphics	Jul 02, 2009 Mentor Graphics Technical Library
Making the Case For an Integrated FPGA Design Flow	Mentor Graphics	Jun 30, 2009 Mentor Graphics Technical Library
Electro-Thermal Modeling of a Large-Surface OLED	Mentor Graphics	Jun 28, 2009 Mentor Graphics Technical Library
Layout Pattern Dependence-Aware Highly Accurate Simulation Flow with Calibre nmLVS	Mentor Graphics	Jun 28, 2009 Mentor Graphics Technical Library
Advanced Clock Gating Techniques in Catapult C Synthesis	Mentor Graphics	Jun 28, 2009 Mentor Graphics Technical Library
Thermal and Electrical Characterization of Large Area OLEDS	Mentor Graphics	Jun 19, 2009 Mentor Graphics Technical Library
Thermal Transient Modeling and Experimental Validation in the European Project PROFIT	Mentor Graphics	Jun 19, 2009 Mentor Graphics Technical Library
Thermal Transient Characterization of Single and Stacked-Die	Mentor Graphics	Jun 19, 2009 Mentor Graphics Technical Library
Thermal Issues in Stacked Die Packages	Mentor Graphics	Jun 19, 2009 Mentor Graphics Technical Library
Non-Linearity Issues in the Dynamic Compact Model Generation	Mentor Graphics	Jun 19, 2009 Mentor Graphics Technical Library
Dynamic Cooling Mount Compact Models for Board-Level Design	Mentor Graphics	Jun 19, 2009 Mentor Graphics Technical Library
Electric and Thermal Transient Effects in Optical Devices	Mentor Graphics	Jun 19, 2009 Mentor Graphics Technical Library
Structure Function Evaluation of Stacked Dies	Mentor Graphics	Jun 19, 2009 Mentor Graphics Technical Library
Thermal Measurement and Modeling of Multi-Die Packages	Mentor Graphics	Jun 19, 2009 Mentor Graphics Technical Library
Package Characterization: Simulations or Measurements?	Mentor Graphics	Jun 19, 2009 Mentor Graphics Technical Library
Power LED Electrical Thermal and Optical Characterization	Mentor Graphics	Jun 19, 2009 Mentor Graphics Technical Library
Simtest Simulation: A Powerful Tool for Embedded Software Development	Mentor Graphics	Jun 11, 2009 Mentor Graphics Technical Library
Microtec C/C++ Compiler Toolkit for PowerPC	Mentor Graphics	Jun 11, 2009 Mentor Graphics Technical Library
Prevention is Better Than The Cure: Compiler Run Time Error Checking	Mentor Graphics	Jun 11, 2009 Mentor Graphics Technical Library
Advantages of Host Simulation Over Other Types of Embedded Software Simulators	Mentor Graphics	Jun 04, 2009 Mentor Graphics Technical Library
Reducing Development Program Risk	Mentor Graphics	May 29, 2009 Mentor Graphics Technical Library
Chip-Scale Copper Electroplating and CMP Simulator	Mentor Graphics	May 21, 2009 Mentor Graphics Technical Library
Signal Integrity Optimization with Olympus-SoC	Mentor Graphics	May 15, 2009 Mentor Graphics Technical Library
User Interface and Graphics Development for Embedded Systems	Mentor Graphics	May 15, 2009 Mentor Graphics Technical Library
Delivering Rich and Customizable User Interfaces for Multimedia-Enabled Products	Mentor Graphics	May 15, 2009 Mentor Graphics Technical Library
Inflexion UI: A New Approach to User Interface Creation for Consumer Electronic Devices	Mentor Graphics	May 15, 2009 Mentor Graphics Technical Library
Simulation of Steady State and Transient Solar Loading of Outdoor Fiber Optic Enclosure	Mentor Graphics	May 12, 2009 Mentor Graphics Technical Library
CFD System Level Modeling of a Large Telecommunications Enclosure	Mentor Graphics	May 12, 2009 Mentor Graphics Technical Library
A Case Study: Critical Area and Critical Feature Analysis of Production 90nm Designs at LSI Corporation	Mentor Graphics	May 07, 2009 Mentor Graphics Technical Library
Equation-Based DRC: A Novel Approach to Resolving Complex Nanometer Design Issues	Mentor Graphics	May 07, 2009 Mentor Graphics Technical Library
Improving Efficiency Productivity and Coverage Using SystemVerilog OVM Registers	Mentor Graphics	May 07, 2009 Mentor Graphics Technical Library
A Closer Look at Veloce Technology: Taking Hardware-assisted Verification to the Next Level	Mentor Graphics	May 07, 2009 Mentor Graphics Technical Library
VPI for SystemVerilog Goes Dynamic	Mentor Graphics	May 2009 Mentor Graphics Technical Library
Towards an Object-Oriented Design Methodology Using SystemVerilog	Mentor Graphics	May 07, 2009 Mentor Graphics Technical Library
Is There a Future for SystemVerilog Interfaces?	Mentor Graphics	May 07, 2009 Mentor Graphics Technical Library
Using Parameterized Classes and Factories: The Yin and Yang of Object-Oriented Verification	Mentor Graphics	May 07, 2009 Mentor Graphics Technical Library
Transformation Procedure from Sparse OPC Model to Grid-Based Model	Mentor Graphics	May 01, 2009 Mentor Graphics Technical Library
Design Driven Test Patterns for OPC Models Calibration	Mentor Graphics	May 01, 2009 Mentor Graphics Technical Library
Model-Based Retarget for 45nm Node and Beyond	Mentor Graphics	May 01, 2009 Mentor Graphics Technical Library
OPC for Reduced Process Sensitivity in the Double Patterning Flow	Mentor Graphics	May 01, 2009 Mentor Graphics Technical Library
Smart Data Filtering for Enhancement of Model Accuracy	Shady Abdelwahed et al Mentor Graphics	May 01, 2009 Mentor Graphics Technical Library
Modeling Laser Bandwidth for OPC Applications	Christian Zuniga et al Mentor Graphics et al	May 01, 2009 Mentor Graphics Technical Library
A New Interface Enables High Scan-Test Quality in Pin-Limited Devices	Jocelyn Moreau and Jayant D'Souza STMicroelectronics and Mentor Graphics	May 2009 Technical Paper
Manufacturability of ILT patterns in low-NA 193nm environment	Mentor Graphics	Apr 30, 2009 Mentor Graphics Technical Library
Implementing a Framework to Generate a Unified OPC database from different EDA Vendors for 45nm and beyond	Mentor Graphics	Apr 30, 2009 Mentor Graphics Technical Library
Experimental Result and Simulation Analysis for the use of Pixelated Illumination from Source Mask Optimization for 22nm Logic Lithography Process	Mentor Graphics	Apr 30, 2009 Mentor Graphics Technical Library
Designing Multi-FPGA Prototypes That Act Like ASICs	Mentor Graphics	Apr 29, 2009 Mentor Graphics Technical Library
EDA tools confront the complexity by supporting vehicle design processes	Enrique Ortega Mentor Graphics	Apr 2009 Technical Paper
Opening Eyes on Fiber Weave and CAF	Mentor Graphics	Apr 21, 2009 Mentor Graphics Technical Library
No Government Bailout for Poor Test Planning	Ron Press Mentor Graphics	Apr 2009 Technical Paper
Full-flow for transistors simulation based on edge-contour extraction and advanced SPICE simulation	Mentor Graphics	Apr 17, 2009 Mentor Graphics Technical Library
Detecting Context Sensitive Hotspots in Standard Cell Libraries	Mentor Graphics	Apr 17, 2009 Mentor Graphics Technical Library
Application of pixel-based mask optimization technique for high-transmission attenuated PSM	Mentor Graphics	Apr 17, 2009 Mentor Graphics Technical Library
Directional kernels as models for fast layout's pattern transfer verification	Mentor Graphics	Apr 17, 2009 Mentor Graphics Technical Library
Design specific variation in pattern transfer by via/contact etch process: full-chip analysis	Mentor Graphics	Apr 17, 2009 Mentor Graphics Technical Library
Automatic SRAF size optimization during OPC	Mentor Graphics	Apr 17, 2009 Mentor Graphics Technical Library
Pattern matching assisted modeling test pattern generation	Mentor Graphics	Apr 17, 2009 Mentor Graphics Technical Library
Calibrating OPC model with full CD profile data for 2D and 3D patterns using scatterometry	Mentor Graphics	Apr 15, 2009 Mentor Graphics Technical Library
Extreme vs. Traditional OPC for the 22nm Node	Mentor Graphics	Apr 15, 2009 Mentor Graphics Technical Library
Modeling Mask Scattered Field at Oblique Incidence	Mentor Graphics	Apr 15, 2009 Mentor Graphics Technical Library
Contour-quality assessment for OPC model calibration	Mentor Graphics	Apr 15, 2009 Mentor Graphics Technical Library
Process Variability Band Analysis for Quantitative Optimization of Exposure	Mentor Graphics	Apr 15, 2009 Mentor Graphics Technical Library
High-Precision Contouring from SEM Image in 32-nm Lithography and Beyond	Mentor Graphics	Apr 15, 2009 Mentor Graphics Technical Library
Pushing the Limits of RET with Different Illumination Methods	Mentor Graphics	Apr 15, 2009 Mentor Graphics Technical Library
Three Proven Techniques for Improving Embedded Software Performance	Mentor Graphics	Apr 15, 2009 Mentor Graphics Technical Library
22 nm Technology Node Active Layer Patterning for Planar Transistor Devices	Mentor Graphics	Apr 15, 2009 Mentor Graphics Technical Library
Model-Based Adaptive Fragmentation	Mentor Graphics	Apr 15, 2009 Mentor Graphics Technical Library
Contour-Based Optical Proximity Correction	Mentor Graphics	Apr 15, 2009 Mentor Graphics Technical Library
New Approach to Determine Best Beam Focus	Mentor Graphics	Apr 15, 2009 Mentor Graphics Technical Library
The PIXBAR OPC for Contact-Hole Pattern in sub-70-nm Generation	Mentor Graphics	Apr 15, 2009 Mentor Graphics Technical Library
Pre-OPC layout decomposition for image fidelity improvement	Mentor Graphics	Apr 15, 2009 Mentor Graphics Technical Library
Intensive Optimization of masks and sources for 22nm lithography	Mentor Graphics	Apr 15, 2009 Mentor Graphics Technical Library
Compute resource management and TAT control in mask data preparation	Mentor Graphics	Apr 15, 2009 Mentor Graphics Technical Library
Mitigate Multi-Processor Synchronization Risks with Processor-Driven Verification	Mentor Graphics	Apr 13, 2009 Mentor Graphics Technical Library
Nucleus: Medical Applications in Safe Hands	Mentor Graphics	Apr 09, 2009 Mentor Graphics Technical Library
JTAG Debug—Everything You Need to Know	Mentor Graphics	Apr 09, 2009 Mentor Graphics Technical Library
Accelerate Design Closure with Parallel Timing Analysis and Optimization	Mentor Graphics	Apr 07, 2009 Mentor Graphics Technical Library
Thermal Limits of Flip Chip Package—Experimentally Validated	Mentor Graphics	Apr 06, 2009 Mentor Graphics Technical Library
Thermal Modeling and Analysis of an Aircraft Electronics Navigation Unit Under High-Altitude Conditions	Mentor Graphics	Apr 06, 2009 Mentor Graphics Technical Library
Vial Filling Cleanroom Case Study	Mentor Graphics	Apr 06, 2009 Mentor Graphics Technical Library
The Development of Libraries of Physical Models of Electrical Components for an Integrated Design Environment	Mentor Graphics	Apr 06, 2009 Mentor Graphics Technical Library
To Retain or Not to Retain: How Do I Verify the State Elements of My Low Power Design?	Mentor Graphics	Mar 31, 2009 Mentor Graphics Technical Library
Advanced Verification of Low Power Designs	Mentor Graphics	Mar 31, 2009 Mentor Graphics Technical Library
Functional Verification of Low Power Designs at RTL	Mentor Graphics	Mar 31, 2009 Mentor Graphics Technical Library
An Acceleratable OVM Methodology Based on SCE-MI 2	Mentor Graphics	Mar 31, 2009 Mentor Graphics Technical Library
Thermal Performance Comparison of a Microprocessor Using Phase Change Materials in Various Configurations	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
A Design Approach to Thermal Characterization of Forced Convection Systems Using Superposition in CFD	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
3D Model to Analyse the Thermal Behaviour of a Digital Rectifier	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
Thermal Analysis of MAXITE Micro Base Station	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
Investigating Limits in Naturally Cooled Systems Using FloTHERM	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
The Significance of Radiation in a Central Office Chassis: A Case Study	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
The effect of fan swirl to PSU cooling	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
System Cooling of Outdoor Wi-Fi Antenna	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
Computational Fluid Dynamics (CFD) Applied to Cleanroom and Isolator Applications	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
New Ways of Using FloVENT for Effective Data Center Analysis	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
A Real Application of Airflow Modeling in Optimizing Cleanroom Design	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
Using CFD to Predict the Flow Behaviour of the UHP Lamp	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
Liquid Cooling of Bright LEDs for Automotive Applications	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
DELPHI Compact Models Revolutionize Thermal Design	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
Indoor Base Station Space Model vs FloTHERM	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
Using FloTHERM and the Command Center to Exploit the Principle of Superposition	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
The Extraction of a Two-Resistor/Two-Capacitor Model for Common Component/Package Design and their Implementation in CFD	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
Competitive Analysis: 9 Slot CompactPCI Development Chassis	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
Thermal analysis of an UHP high current driver	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
Thermal Characterization of Cavity-Down TBGA (Tape Ball Grid Arrays) Package with FloTHERM simulation	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
Software Simulation of a Double-Sided PCB	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
Characterisation of boundary conditions for an aircraft engine electronic control unit	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
Numerical Modeling Of Closely Spaced Supply Diffusers In A High Air Change Rate Application	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
Design Characteristics of High Performance and Reduced Cost Chip Scale Package—µBGA	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
Maintaining a Model Climate at M&S	Mentor Graphics	Mar 30, 2009 Mentor Graphics Technical Library
Low-Power Physical Design with Olympus-SoC	Mentor Graphics	Mar 26, 2009 Mentor Graphics Technical Library
The Developing Technologies of Integrated Optical Waveguides in Printed Circuits	Happy Holden Mentor Graphics	Mar 19, 2009 Mentor Graphics Technical Library
DFM-Compliant IP: Why You Need It How You Get It	Kuang-Kuo Lin et al Mentor Graphics	Mar 19, 2009 Mentor Graphics Technical Library
Measuring the Performance of Equalized Serial Data Links Across the Design Flow	Steven McKinney et al Mentor Graphics and Tektronix	Mar 16, 2009 Mentor Graphics Technical Library
Model based mask process correction and verification for advanced process nodes	Timothy Lin et al Mentor Graphics	Mar 16, 2009 Mentor Graphics Technical Library
Your Fill Solution Should Match Your Fill Analysis	Jeff Wilson and Craig Larsen Mentor Graphics	Mar 16, 2009 Mentor Graphics Technical Library
Establishing Confidence in PDN Simulation	Eric Bogatin Bogatin Enterprises	Mar 16, 2009 Mentor Graphics Technical Library
Power Integrity Effects of High Density	Happy Holden and Patrick Carrier Mentor Graphics	Mar 16, 2009 Mentor Graphics Technical Library
Harvesting Real Productivity from Simulation Farms	Matthew Ballance Mentor Graphics	Mar 2009 Mentor Graphics Technical Library
Block-Based FPGA Design Flows Support Team Design and IP Re-use	Ehab Mohsen Mentor Graphics	Mar 02, 2009 Mentor Graphics Technical Library
Power Management for Portable Consumer Electronic Devices	Stephen Olsen Mentor Graphics	Feb 25, 2009 Mentor Graphics Technical Library
Code Coverage Explained: For DO-254 Projects	David Landoll and Michelle Lange Mentor Graphics	Feb 18, 2009 Mentor Graphics Technical Library
Formal Verification for DO-254 (and Other Safety-Critical) Designs	David Landoll Mentor Graphics	Feb 18, 2009 Mentor Graphics Technical Library
Methodology for Board Level Functional Simulation and Hardware/Software Co-Verification using Seamless	John Gryba Alcatel-Lucent	Feb 2009 Mentor Graphics Technical Library
Applying Assertion-Based Formal Verification to Verification Hot Spots	Ping Yeung and Sundaram Subramanian Mentor Graphics	Feb 2009 Mentor Graphics Technical Library
OS Strategies for the Next Generation of Green Devices	Stephen Olsen Mentor Graphics	Feb 2009 2009 Embedded Systems Conference
A Scalable Approach for TLM across SystemC and SystemVerilog	Shashi Bhutada Mentor Graphics	Feb 06, 2009 Mentor Graphics Technical Library
Planning SystemVerilog Adoption	Shashi Bhutada Mentor Graphics	Jan 26, 2009 Mentor Graphics Technical Library
Synthesis for DO-254 Design Assurance and other Safety-Critical Design Processes	Sanjay Thatte and Michelle Lange Mentor Graphics	Jan 08, 2009 Mentor Graphics Technical Library
Improving the CD linearity and proximity performance of photomasks written on the Sigma7500-II DUV laser writer through embedded OPC	Amanda Bowhill et al Mentor Graphics	Jan 08, 2009 Mentor Graphics Technical Library
A User-programmable Link between Data Preparation and Mask Manufacturing Equipment	Weidong Zhang et al Mentor Graphics	Jan 08, 2009 Mentor Graphics Technical Library
Reduction of layout complexity for shorter mask writetime	Kenneth Jantzen et al AMD and Mentor Graphics	Jan 08, 2009 Mentor Graphics Technical Library
Tightening the Loop on Coverage Closure	Mike Andrews Mentor Graphics	Jan 07, 2009 Mentor Graphics Technical Library
Layout-Aware Diagnosis	Mentor Graphics	Dec 15, 2008 Mentor Graphics Technical Library
Enhancing Process Model Stability & Predictability Using SEM Image Contours	Mohamed Serag El-Din Habib Mentor Graphics	Dec 03, 2008 Mentor Graphics Technical Library
Convergence-based OPC Method for Dense Simulations	Tamer Desouky Mentor Graphics	Dec 01, 2008 Mentor Graphics Technical Library
Double Dipole RET Investigation for 32 nm Metal Layers	Carl Babcock et al Mentor Graphics	Dec 01, 2008 Mentor Graphics Technical Library
Toward Faster OPC Convergence: Advanced Analysis for OPC Iterations and Simulation Environment	Mohamed Bahnas, Mohamed Al-Imam and Tamer Tawfik Mentor Graphics	Dec 01, 2008 Mentor Graphics Technical Library
Fast and Simple Modeling of Non-Rectangular Transistors	Jen-Yi Wuu, Fedor G. Pikus and Malgorzata Marek-Sadowska Mentor Graphics	Dec 01, 2008 Mentor Graphics Technical Library
Characterizing OPC model accuracy versus lens induced polarization effects in hyper NA immersion lithography	Tamer M. Tawfik and Edita Tejnil Mentor Graphics	Nov 20, 2008 Mentor Graphics Technical Library
AIMS-45 image validation of contact hole patterns after inverse lithography at NA 1.35	E. Hendrickx et al Mentor Graphics	Nov 20, 2008 Mentor Graphics Technical Library
Accelerate OPC convergence with new iteration control methodology	Ching-HengWang et al Mentor Graphics	Nov 20, 2008 Mentor Graphics Technical Library
Implementation-Quality Prototyping With Olympus-SoC: Accelerating Design Closure for Advanced ICs	Mentor Graphics	Nov 20, 2008 Mentor Graphics Technical Library
TrustMe-ViP: A Virtual RF System Platform Project for TPD	Gilles Jacquemod	Nov 20, 2008 Mentor Graphics Technical Library
Critical Feature Analysis as Golden Path to DFM Closure	Robert Boone et al Freescale Semiconductor and STMicroelectronics	Nov 19, 2008 Mentor Graphics Technical Library
Calibre OTSS Validation for Medical Applications	Andrew Bartczak Boston Scientific	Nov 19, 2008 Mentor Graphics Technical Library
Chip IR Drop Reduction Through Automated Via Checking and Addition	Arya Raychaudhuri Fastrack Design	Nov 19, 2008 Mentor Graphics Technical Library
Litho Friendly Design Kit: A Tool of DFM Strategy	Fabrice Bernard-Granger et al STMicroelectronics, Mentor Graphics and CEA-Leti	Nov 19, 2008 Mentor Graphics Technical Library
Calibre Rule Code Testability: The Good The Bad and The Ugly	Ronald Kalim and Cory Davis Cypress Semiconductor	Nov 19, 2008 Mentor Graphics Technical Library
An Evolution of Gate and Via Parasitic Resistance Extraction	Jarrod Stykes Cypress Semiconductor	Nov 19, 2008 Mentor Graphics Technical Library
Relative Accuracy Simulation Method by Using ADIT and CPU Distribution	Mikiko Sode NEC Electronics	Nov 19, 2008 Mentor Graphics Technical Library
Adaptive Automatic Fragmentation	Mohamed Serag El-Din Habib Mentor Graphics	Nov 19, 2008 Mentor Graphics Technical Library
Electro-Migration Check with Eldo	Alfredo Tomasini Linear Technology	Nov 18, 2008 Mentor Graphics Technical Library
How to Model Power Systems Using SystemVision	Scott Cooper, Mike Donnelly and Darrell Teegarden Mentor Graphics	Nov 11, 2008 Mentor Graphics Technical Library
Pixel-based SRAF Implementation for 32nm Lithography Process	Byung-Sung Kim et al Mentor Graphics	Nov 10, 2008 Mentor Graphics Technical Library
Double-patterning Decomposition Design Compliance and Verification Algorithms at 32nm hp	Alexander Tritchkov et al Mentor Graphics	Nov 10, 2008 Mentor Graphics Technical Library
FPGA Synthesis: Looking Beyond the Obvious	Ehab Mohsen Mentor Graphics	Oct 31, 2008 Mentor Graphics Technical Library
Modeling a Digitally Controlled Power Supply	Scott Cooper Mentor Graphics	Oct 29, 2008 Mentor Graphics Technical Library
Getting Started with the OVM 2.0: AVM Backward Compatibility and Migration	Mentor Graphics	Oct 29, 2008 Mentor Graphics Technical Library
Design for Variability: Managing Design Process and Manufacturing Variations in Physical Design	Sudhakar Jilla Mentor Graphics	Oct 27, 2008 Mentor Graphics Technical Library
Overview of Sequence Based Stimulus Generation in OVM 2.0	Andy Meyer Mentor Graphics	Oct 20, 2008 Mentor Graphics Technical Library
Processor-Driven Verification	Piotr Luszczak Mentor Graphics	Oct 20, 2008 Mentor Graphics Technical Library
Confronting Chip Assembly Challenges: Avoid Late-Stage Bottlenecks in Physical Design	Sudhakar Jilla Mentor Graphics	Oct 17, 2008 Mentor Graphics Technical Library
Introducing the Powerful Capabilities of SimTest Runtime	Ville-Veikko Helppi Mentor Graphics	Oct 14, 2008 Mentor Graphics Technical Library
Microtec C/C++ Compiler Toolkit for PowerPC (v3.4)	Ville-Veikko Helppi Mentor Graphics	Oct 14, 2008 Mentor Graphics Technical Library
Nucleus Platform Solutions	Mentor Graphics	Oct 02, 2008 Mentor Graphics Technical Library
Hardware-assisted Verification for the Efficient Validation of Multiprocessor-based Designs	Hans Multhaup and Richard Pugh Mentor Graphics	Sep 2008 ARM IQ Article
Using inFact in an OVM Environment--An Application Note	Mentor Graphics	Sep 23, 2008 Mentor Graphics Technical Library
DO-254 Compliance: Reducing Project Cost by Avoiding Common Pitfalls	Tammy Reeve and Michelle Lange Patmos Engineering Services and Mentor Graphics	Sep 11, 2008 Mentor Graphics Technical Library
Raising the RTL Abstraction Level and Design Conciseness with SystemVerilog	Sachin Kakkar et al Mentor Graphics	Aug 28, 2008 Mentor Graphics Technical Library
Automatic Assist Feature Placement Optimization Based on Process-Variability Reduction	Srividya Jayaram et al Mentor Graphics	Aug 26, 2008 Mentor Graphics Technical Library
Simultaneous Model-based Main Feature and SRAF Optimization for 2D SRAF Implementation to 32 nm Critical Layers	Ayman Yehia and Alexander Tritchkov Mentor Graphics	Aug 26, 2008 Mentor Graphics Technical Library
Setting MRC Rules: Balancing Inspection Capabilities, Defect Sensitivity and OPC	Mohamed Gheith et al Mentor Graphics	Aug 25, 2008 Mentor Graphics Technical Library
Implementation of Adaptive Site Optimization in Model-Based OPC for Minimizing Ripples	M. Bahnas et al Mentor Graphics	Aug 25, 2008 Mentor Graphics Technical Library
Optimization of OPC Runtime Using Efficient Optical Simulation	Mohamed Al-Imam and Walid A. Tawfic Mentor Graphics	Aug 21, 2008 Mentor Graphics Technical Library
Tolerable CD Variation Analyzer Using Perturbed Nominal Models Demonstrated on altPSM	Mohamed Al-Imam et al. Mentor Graphics	Aug 21, 2008 Mentor Graphics Technical Library
Safe Interpolation Distance for VT5 Resist Model	Walid Tawfic et al. Mentor Graphics	Aug 21, 2008 Mentor Graphics Technical Library
Addressing Reliability and Circuit Verification Challenges with Calibre PERC	Hazem Hegazy Mentor Graphics	Jul 28, 2008 Mentor Graphics Technical Library
Reducing IC Cycle Time with Calibre	Mathew Hogan Mentor Graphics	Jul 28, 2008 Mentor Graphics Technical Library
Variability Aware Modeling and Characterization in Standard Cell in 45 nm CMOS with Stress Enhancement Technique	H. Aikawa et al Mentor Graphics	Jul 28, 2008 Mentor Graphics Technical Library
Model-Driven Design for Six Sigma	Darrell Teegarden Mentor Graphics	Jul 25, 2008 Mentor Graphics Technical Library
Nucleus Multimedia Framework and the OpenMax IL Standard	Sheikh Muhammad Mustafa and Fakhir Ahmet Ansari Mentor Graphics	Jul 14, 2008 Mentor Graphics Technical Library
The New Wave in Functional Verification: Intelligent Testbench Automation	Mark Olen Mentor Graphics	Jul 2008 Mentor Graphics Technical Library
Designing and Implementing Architectures for Distributed Automotive E/E Systems	Thomas Heurung and Stefan Walz Mentor Graphics	Jul 08, 2008 Mentor Graphics Technical Library
Advanced Algorithmic Evaluation for Imaging, Communication and Audio Applications	Toshiba	Jul 07, 2008 Mentor Graphics Technical Library
Avoid FPGA Project Delays by Adopting Advanced Design Methodologies	Alex Vals Mentor Graphics	Jun 25, 2008 Mentor Graphics Technical Library
Firmware Driven OVM Testbench	Jim Kenney Mentor Graphics	Jun 25, 2008 Mentor Graphics Technical Library
Intelligent Testbench Automation—Now a Reality, No Longer Just a Promise	Jay O'Donnell Mentor Graphics	Jun 25, 2008 Mentor Graphics Technical Library
Nucleus RTP/RTSP Streaming Rich Multimedia Content Across IP Networks	Fakhir Ahmed Ansari Mentor Graphics	Jun 23, 2008 Mentor Graphics Technical Library
Exploiting Virtual Memory	Todd Brian and Larina D'Souza Mentor Graphics	Jun 23, 2008 Mentor Graphics Technical Library
Implementing SystemVerilog for FPGA Design	Ehab Mohsen Mentor Graphics	May 29, 2008 Mentor Graphics Technical Library
Hardware-Assisted Verification for Efficient Validation of Multi-Processor Based Designs	Richard Pugh and Hans Multhaup Mentor Graphics	May 07, 2008 Mentor Graphics Technical Library
Managing Timing Constraints with Precision Synthesis	Ehab Mohsen Mentor Graphics	May 02, 2008 Mentor Graphics Technical Library
Developing Automotive Products Using the EAST-ADL2, an AUTOSAR Compliant Architecture Description Language	P. Cuenot et al. Siemens VDO Automotive SAS, ETAS GmbH, Volvo Technology, CEA LIST, Technical University of Berlin, Royal Institute of Technology, and Mentor Graphics	Apr 23, 2008 Mentor Graphics Technical Library
The CHIPit UMRBus Communication System Opens New Ways of Design Verification	Rajkumar Methuku and Markus Karg ProDesign Electronics	Apr 17, 2008 Mentor Graphics Technical Library
CAN Bus Signal Integrity Design	Mike Donnelly Mentor Graphics	Apr 17, 2008 Mentor Graphics Technical Library
Highly Reliable Detection and Correction of Pinched Areas for High Transmission Phase Shift Mask	Chih Li Chen et al. NANYA Technology and Mentor Graphics	Apr 14, 2008 Mentor Graphics Technical Library
SEM-Contour Based Mask Modeling	Jim Vasek et al. Freescale Semiconductor, Applied Materials, and Mentor Graphics	Apr 14, 2008 Mentor Graphics Technical Library
Fitness and Runtime Correlation of Compact Model Complexity	Alexander N. Drozdov et al. Mentor Graphics	Apr 14, 2008 Mentor Graphics Technical Library
Novel Method for Optimizing Lithography Exposure Conditions Using Full-Chip Post-OPC Simulation	John Sturtevant et al. Mentor Graphics	Apr 14, 2008 Mentor Graphics Technical Library
Coupled-Dipole Modelling for 3D Mask Simulation	Vlad Temchenko et al. Mentor Graphics and Infineon	Apr 14, 2008 Mentor Graphics Technical Library
Optimized OPC Approach for Process Window Improvement	Ching-HengWang et al. SMIC and Mentor Graphics	Apr 14, 2008 Mentor Graphics Technical Library
OPC Model Calibration Considerations for Data Variance	Mohamed Bahnas and Mohamed Al-Imam Mentor Graphics	Apr 14, 2008 Mentor Graphics Technical Library
Exposure Tool Specific Post-OPC Verification	John Sturtevant et al. Mentor Graphics	Apr 14, 2008 Mentor Graphics Technical Library
A Novel Methodology for Model-Based OPC Verification	TengYen Huang et al. Nanya and Mentor Graphics	Apr 14, 2008 Mentor Graphics Technical Library
Implementing a Framework to Generate a Unified OPC Database from Different EDA Vendors for 45nm and Beyond	Shady Abdel Wahed et al. Mentor Graphics and United Microelectronics	Apr 14, 2008 Mentor Graphics Technical Library
Layout Verification in the Era of Process Uncertainty: Target Process Variability Bands vs. Actual Process Variability Bands	J. Andres Torres Mentor Graphics	Apr 14, 2008 Mentor Graphics Technical Library
The Use of EUV Lithography to Produce Demonstration Devices	Bruno La Fontaine et al. Mentor Graphics, AMD, IBM, Toshiba, and ASML	Apr 14, 2008 Mentor Graphics Technical Library
Advanced Debug Methods for DSM Driven Testbenches	Jim Kenney Mentor Graphics	Apr 2008 ARM IQ Article
Designing RF, Analog and Digital on PCB	John Isaac Mentor Graphics	Mar 28, 2008 Mentor Graphics Technical Library
Preserving Freedom of Choice When Designing FPGAs	Ehab Mohsen Mentor Graphics	Mar 28, 2008 Mentor Graphics Technical Library
The Use of Advanced Verification Methods to Address DO-254 Design Assurance	James P. Keithan et al. Mentor Graphics and XtremeEDA	Mar 20, 2008 Mentor Graphics Technical Library
Achieving Quality and Traceability in FPGA/ASIC Flows for DO-254 Aviation Projects	Michelle Lange and Tom Dewey Mentor Graphics	Mar 20, 2008 Mentor Graphics Technical Library
Demystifying DO-254	Tom Dewey Mentor Graphics	Feb 29, 2008 Mentor Graphics Technical Library
Real Incremental Design for FPGAs	Rakesh Jain Mentor Graphics	Feb 28, 2008 Mentor Graphics Technical Library
Implementing DDR3 DIMMs with Modern FPGAs	Altera	Feb 28, 2008 Mentor Graphics Technical Library
Object Action Language Reference Manual	Mentor Graphics	Feb 05, 2008 Mentor Graphics Technical Library
High Quality Test Solutions for Secure Applications	Mentor Graphics	Feb 05, 2008 Mentor Graphics Technical Library
Managing Precious FPGA Resources	Darren Zacher Mentor Graphics	Jan 31, 2008 Mentor Graphics Technical Library
Reducing Physical Verification Cycle Time	John Ferguson Mentor Graphics	Jan 04, 2008 Mentor Graphics Technical Library
Scatter/Gather DMAs for PCI Express-Enabled Embedded Systems	Lattice Semiconductor	Jan 03, 2008 Mentor Graphics Technical Library
Automating Clock-Domain Crossing Verification for Do-254 (and Other Safety-Critical) Designs	Michelle Lange Mentor Graphics	Dec 17, 2007 Mentor Graphics Technical Library
Getting Started in HDI Fabrication	Happy Holden Mentor Graphics	Dec 12, 2007 Mentor Graphics Technical Library
Passing the Test	Happy Holden Mentor Graphics	Dec 12, 2007 Mentor Graphics Technical Library
PCIe — A Technology-Laden Communications Interface for the Future	C.C. Hung Mentor Graphics	Dec 11, 2007 Mentor Graphics Technical Library
Supporting CPRI-Based Distributed Architectures with Cost Optimized FPGAs	Lattice Semiconductor	Nov 30, 2007 Mentor Graphics Technical Library
Using High-Level Synthesis for FPGA Development	Tomonori Yamashita et al. Mentor Graphics	Nov 29, 2007 Mentor Graphics Technical Library
Hardware/Software Validation with a TLM Virtual System Prototype	Alon Wintergreen and Rami Rachamim Mentor Graphics	Nov 29, 2007 Mentor Graphics Technical Library
Bottom-Up Design Flow Using Precision Synthesis	Shantuna Kamat Mentor Graphics	Nov 28, 2007 Mentor Graphics Technical Library
Minimizing the Cost of Using Free Processor IP	Darren Zacher Mentor Graphics	Nov 02, 2007 Mentor Graphics Technical Library
Closing the Loop in Testbench Automation	Mark Olen Mentor Graphics	Oct 29, 2007 Mentor Graphics Technical Library
Applying Assertion-Based Formal Verification to Verification Hot Spots	Ping Yeung and Sundaram Subramanian Mentor Grapics	Oct 25, 2007 Mentor Graphics Technical Library
A Comparison of Metastability Modeling Methods	Chris Kwok and Roger Sabbagh Mentor Graphics	Oct 24, 2007 Mentor Graphics Technical Library
DO-254 Compliant Design and Verification with VHDL-AMS	Darrell Teegarden Mentor Graphics	Oct 12, 2007 Mentor Graphics Technical Library
Designing High Performance DSP Hardware Using Catapult C Synthesis and the Altera Accelerated Libraries	Mike Fingeroff and Thiagaraja Gopalsamy Mentor Graphics and Altera	Oct 10, 2007 Mentor Graphics Technical Library
Physically Aware Synthesis in Precision RTL Plus	Nan-Chi Chou and Pei-Ning Guo Mentor Graphics	Sep 2007 Mentor Graphics Technical Library
Leveraging FPGA in PCB System Designs: Optimizing Profit Margin	Dave Brady Mentor Graphics	Sep 19, 2007 Mentor Graphics Technical Library
Low Power Design and Verification Techniques	Stephen Bailey et al. Mentor Graphics	Sep 13, 2007 Mentor Graphics Technical Library
Maximizing Performance and Reliability of FSMs with Precision Synthesis	Ron Plyler Mentor Graphics	Sep 05, 2007 Mentor Graphics Technical Library
Logical and Physical Design Reuse	Todd Hendren Mentor Graphics	Aug 28, 2007 Mentor Graphics Technical Library
Homogenous HW/SW Debug Simplifies Adoption of Processor-Driven Tests	Jim Kenney Mentor Graphics	Aug 2007 ARM IQ Article
Effective Functional Verification Methodologies for DO-254 Level A/B and Other Safety-Critical Devices	Michelle Lange and T.J. Boer Mentor Graphics	Aug 21, 2007 Mentor Graphics Technical Library
Rules-Based Code Generation	Keith Brown Mentor Graphics	Aug 17, 2007 Mentor Graphics Technical Library
Experimental Jitter Analysis in a FlexCAN-based Drive-by-Wire Automotive Application	Jason Paskvan Mentor Graphics	Aug 16, 2007 Mentor Graphics Technical Library
Planning Formal Verification Closure	Harry Foster and Ping Yeung Mentor Graphics	Aug 16, 2007 Mentor Graphics Technical Library
SVA Local Variable Coding Guidelines for Efficient Use	Jian Long et al. Mentor Graphics	Aug 02, 2007 Mentor Graphics Technical Library
Requirements Tracing	Cort Starrett Mentor Graphics	Aug 02, 2007 Mentor Graphics Technical Library
Topology Planning and Routing — Combining the Expertise of the Designer with Auto-routing Speed	John Isaac Mentor Graphics	Jul 31, 2007 Mentor Graphics Technical Library
HDI Layer Stackups for Large Dense PCBs	Mentor Graphics	Jul 30, 2007 Mentor Graphics Technical Library
An Integrated Tool Flow Supporting FPGA Prototyping and Debug	Brian Bailey and Ehab Mohsen Mentor Graphics	Jul 27, 2007 Mentor Graphics Technical Library
Accelerating Wire Harness Development for Off-Highway Vehicles	Nice Price Mentor Graphics	Jul 20, 2007 Mentor Graphics Technical Library
Verification Management: Major Challenges	Darron May Mentor Graphics	Jul 12, 2007 Mentor Graphics Technical Library
The Streamlined Design Flow from Catapult C to Precision RTL Synthesis	Ron Plyler Mentor Graphics	Jul 03, 2007 Mentor Graphics Technical Library
Low-Cost Connections to High-Speed Serial Devices	Bob Blake Mentor Graphics	Jul 03, 2007 Mentor Graphics Technical Library
Nucleus OS - Accelerating Encryption on the PowerPC 8349E	Todd Brian Mentor Graphics	Jun 27, 2007 Mentor Graphics Technical Library
Combining ModelSim and Simulink in an Integrated Simulation Environment	Scott Cooper Mentor Graphics	Jun 26, 2007 Mentor Graphics Technical Library
Addressing Today's Complex Clock Modeling Issues with Veloce Emulation Technology	Mentor Graphics	Jun 19, 2007 Mentor Graphics Technical Library
Considerations for Effective Implementation of Processor-Driven Testbenches	Jim Kenney Mentor Graphics	Jun 15, 2007 Mentor Graphics Technical Library
Using Strong Types in Your SystemVerilog Design and Verification	Mentor Graphics	Jun 14, 2007 Mentor Graphics Technical Library
Enabling DaVinci Technology with Mentor Software	Mentor Graphics	Jun 13, 2007 Mentor Graphics Technical Library
Using Precision Synthesis and MicroBlaze Embedded IP	Darren Zacher Mentor Graphics	Jun 13, 2007 Mentor Graphics Technical Library
Fundamentals of PCB Manufacturing	Mark Laing Mentor Graphics	Jun 11, 2007 Mentor Graphics Technical Library
Cortex-M1: A Powerful Solution for FPGAs	Mike Thompson Mentor Graphics	May 31, 2007 Mentor Graphics Technical Library
Integrating HDL Designer Series and FormalPro Tools	Don Waldoch Mentor Graphics	May 24, 2007 Mentor Graphics Technical Library
Embedded Optical Proximity Correction for the Sigma7500 DUV Mask Writer	Anders Österberg et al. Micronic Laser Systems and Mentor Graphics	May 11, 2007 Mentor Graphics Technical Paper Library
Automated Aerial Image-Based CD Metrology Initiated by Pattern Marking with Photomask Layout Data	Grant Davis et al. Mentor Graphics, Samsung Electronics, and Carl Zeiss	May 11, 2007 Mentor Graphics Technical Paper Library
STMicroelectronics Design Platform for Micro and Nano Technologies Based on Mentor Graphics IC Flow	Iyad Rayane and Vincent Ruet STMicroelectronics	May 01, 2007 Mentor Graphics Technical Paper Library
Using Mentor Graphics Automated Routing Tools in an Analog Layout Flow	Collin Weiss Legerity	May 01, 2007 Mentor Graphics Technical Paper Library
Equivalence Checking for FPGA Design	Jim Henson Mentor Graphics	Apr 20, 2007 Mentor Graphics Technical Library
Tips for FPGA Timing Closure	Troy Scott and Tim Schnettler Mentor Graphics	Apr 20, 2007 Mentor Graphics Technical Library
Designing PCBs with High-Speed Constraints: Developing constraints	Patrick Carrier Mentor Graphics	Apr 18, 2007 Mentor Graphics Technical Library
The Target Platform Methodology for HW/SW Debugging Before Silicon	Maryse Wouters, IMEC Mentor Graphics	Apr 16, 2007 Mentor Graphics Technical Library
Designing an RF System-In-Package with Improved IC Design Environment	Mathieu Behaghel STMicroelectronics	Apr 16, 2007 Mentor Graphics Technical Library
ASIC Prototyping with FPGAs	Ahmed Nabil and Darren Zacher Mentor Graphics	Mar 28, 2007 Mentor Graphics Technical Paper Library
Requirements for a True Mixed-Level TLM-RTL Design Environment	Bill Chown Mentor Graphics	Mar 27, 2007 Mentor Graphics Technical Library
The Integrated IP Subsystem: A Converging SoC Solution	Cary Snyder Mentor Graphics	Mar 26, 2007 Mentor Graphics Technical Library
A Systematic Approach for Capturing Interconnects Hot Spots	Te Hung Wu et al. Mentor Graphics and United Microelectronics	Mar 22, 2007 Mentor Graphics Technical Library
Real-time VT5 Model Coverage Calculations During OPC Simulations	Ioana Graur et al. Mentor Graphics and IBM	Mar 22, 2007 Mentor Graphics Technical Library
Understanding the Impact of Rigorous Mask Effects in the Presence of Empirical Process Models Used in Optical Proximity Correction (OPC)	Michael C. Lam and Konstantinos Adam Mentor Graphics	Mar 22, 2007 Mentor Graphics Technical Library
SEM-Contour Based OPC Model Calibration through the Process Window	Jim Vasek et al. Mentor Graphics, Freescale Semiconductor, and Applied Materials	Mar 22, 2007 Mentor Graphics Technical Library
Automatic OPC Mask Shape Repair	James Word et al. Mentor Graphics	Mar 21, 2007 Mentor Graphics Technical Paper Library
Advances in Compute Hardware Platforms for Computational Lithography	Tom Kingsley et al. Mentor Graphics and Mercury Computer Corporation	Mar 21, 2007 Mentor Graphics Technical Library
Taking Image Quality Factor Into the OPC Model Tuning Flow	Ching-Heng Wang et al. Mentor Graphics and Semiconductor Manufacturing International Corporation	Mar 21, 2007 Mentor Graphics Technical Library
Silicon Verification of Flare Model & Application to Real Chip for Long Range Proximity Correction	Dongqing Zhang et al. Mentor Graphics and Chartered Semiconductor Manufacturing	Mar 21, 2007 Mentor Graphics Technical Library
SEM Based Data Extraction for Model Calibration	Mohamed Al-Imam et al. Mentor Graphics and United Microelectronics	Mar 21, 2007 Mentor Graphics Technical Library
Optimizing Gate Layer OPC Correction and SRAF Placement for Maximum Design Manufacturability	Travis Brist et al. Mentor Graphics	Mar 21, 2007 Mentor Graphics Technical Library
More on Accelerating Physical Verification Using STPRL: a Novel Language for Test Pattern Generation	Ahmed Nouh Mentor Graphics	Mar 21, 2007 Mentor Graphics Technical Library
Mask-friendly OPC for a Reduced Mask Cost and Writing Time	Ayman Yehia Mentor Graphics	Mar 21, 2007 Mentor Graphics Technical Library
Litho Aware Method for Circuit Timing/Power Analysis Through Process	R. S. Fathy et al. Mentor Graphics	Mar 21, 2007 Mentor Graphics Technical Library
Unified Process-Aware System for Circuit Layout Verification	J. Andres Torres and Fedor G. Pikus Mentor Graphics	Mar 21, 2007 Mentor Graphics Technical Library
Feedback Flow to improve Model Based OPC Calibration Test Pattern	Walid A. Tawfic et al. Mentor Graphics	Mar 21, 2007 Mentor Graphics Technical Library
Saving Time with Analog Simulation	Sherwin Davenport Mentor Graphics	Mar 09, 2007 Mentor Graphics Technical Library
Scoring with HDL Designer	Tom Dewey Mentor Graphics	Mar 02, 2007 Mentor Graphics Technical Library
Stratix III Programmable Power	Altera Mentor Graphics	Mar 01, 2007 Mentor Graphics Technical Library
Improving Automotive EE Design with SystemVision	Darrell Teegarden Mentor Graphics	Feb 28, 2007 Mentor Graphics Technical Library
The Second Productivity Revolution—Intelligent Testbench Automation	Mark Olen and Jay O'Donnell Mentor Graphics	Feb 26, 2007 Mentor Graphics Technical Library
Emerging Embedded Technology in the Automotive Industry	Saad Naveed Mentor Graphics	Feb 21, 2007 Mentor Graphics Technical Library
Five Steps to Quality CDC Verification	Ping Yeung, Ph.D. Mentor Graphics	Feb 19, 2007 Mentor Graphics Technical Library
Envisioning the Perfect Development Tool for Embedded Systems	Nelson Navas-Ortega Mentor Graphics	Feb 14, 2007 Mentor Graphics Technical Library
RF and Microwave: Design Challenges in PCBs	Yan Killy Mentor Graphics	Feb 14, 2007 Mentor Graphics Technical Library
How a Compiler Can Aid Embedded Software Developers	Pat Wellander Mentor Graphics	Feb 12, 2007 Mentor Graphics Technical Library
Embedded Performance Trends	Charles M. Byrne Mentor Graphics	Feb 09, 2007 Mentor Graphics Technical Library
TestKompress 2007	Mentor Graphics	Feb 05, 2007 Mentor Graphics Technical Library
HDL Coding and Design Practices for Improving Virtex-5 Utilization, Performance, and Power	Brian Philofsky Xilinx	Jan 24, 2007 Mentor Graphics Technical Library
Debugging Optimized Code	Muhammad Bilal Anwer Mentor Graphics	Jan 24, 2007 Mentor Graphics Technical Library
Incremental FPGA Synthesis	Sanjay Thattle Mentor Graphics	Jan 24, 2007 Mentor Graphics Technical Library
Effective Stackup Design for High-speed Interfaces	Mentor Graphics	Jan 17, 2007 Mentor Graphics Technical Library
Power Optimizations and Fine-Grained Allocation	Ciby Peuse Mentor Graphics	Jan 15, 2007 Mentor Graphics Technical Library
Semaphores and Shared Resources	Barry Sellew Mentor Graphics	Jan 12, 2007 Mentor Graphics Technical Library
The Power and Flexibility of Link-Time Decisions	Meador Inge Mentor Graphics	Jan 09, 2007 Mentor Graphics Technical Library
USB—Under the Hood and Looking Forward	Stephen Olsen Mentor Graphics	Jan 09, 2007 Mentor Graphics Technical Library
FPGA Resource Management	Dan DeVries Mentor Graphics	Dec 21, 2006 Mentor Graphics Technical Library
Low Cost Serial Transmission in an FPGA	Ron Warner and Tim Schnettler Mentor Graphics	Dec 21, 2006 Mentor Graphics Technical Library
Rapid Development of Telematics Applications	Muhammad Umar Mentor Graphics	Dec 21, 2006 Mentor Graphics Technical Library
Post-Mortem Debugging of Embedded RTOS Applications	Andreas Skaret Mentor Graphics	Dec 18, 2006 Mentor Graphics Technical Library
Nucleus SPI: SPI Bus Protocol Stack for Embedded Software Applications	Irfan Ahmad Mentor Graphics	Dec 18, 2006 Mentor Graphics Technical Library
Using Trace for Solving Complex Problems in Real-Time Systems	Hafiz Abid Mentor Graphics	Dec 11, 2006 Mentor Graphics Technical Library
Simple Processor Communication in Embedded Systems	Michael Parker Mentor Graphics	Dec 11, 2006 Mentor Graphics Technical Library
Registered C	Antonio Bigazzi Mentor Graphics	Dec 07, 2006 Mentor Graphics Technical Library
IPv6 for Embedded Devices	Tammy Leino Mentor Graphics	Dec 07, 2006 Mentor Graphics Technical Library
Multicore Applications: Programming and Debugging	Khula Azmi Mentor Graphics	Dec 01, 2006 Mentor Graphics Technical Library
Using FormalPro for Actel Verification in a Precision RTL Flow	Jim Henson Mentor Graphics	Nov 30, 2006 Mentor Graphics Technical Library
Design Security in Stratix III Devices	Altera	Nov 29, 2006 Mentor Graphics Technical Library
Physically Aware Synthesis	Jaggi Balasubramanian Mentor Graphics	Nov 29, 2006 Mentor Graphics Technical Library
Nucleus I2C: Inter IC Communication Protocol for Low-cost Peripheral Operation	Kaleem Anwar and Munam Hafeez Mentor Graphics	Nov 29, 2006 Mentor Graphics Technical Library
C Runtime Checks in Embedded Systems Development	Markus Heiling Mentor Graphics	Nov 17, 2006 Mentor Graphics Technical Library
Network Programming in an Embedded System	Tammy Leino Mentor Graphics	Nov 17, 2006 Mentor Graphics Technical Library
Booting from Flash with MMU or Images with Non-Contiguous Memory	Eric Viering Mentor Graphics	Nov 16, 2006 Mentor Graphics Technical Library
Rethinking Reuse	Bruce Caryl Mentor Graphics	Nov 14, 2006 Mentor Graphics Technical Library
Comparison of VHDL, Verilog and SystemVerilog	Stephen Bailey Mentor Graphics	Nov 13, 2006 Mentor Graphics Technical Library
JTAG Probes—More Than a Debug Connection Device	Jim Alsup Mentor Graphics	Nov 10, 2006 Mentor Graphics Technical Library
Creating a Consistent Verification Environment from Algorithm to RTL	David Burnette Mentor Graphics	Nov 09, 2006 Mentor Graphics Technical Library
An ESL Methodology for Functional Verification between Untimed C++ and RTL using SystemC	David Burnette Mentor Graphics	Nov 03, 2006 Mentor Graphics Technical Library
RTL Analysis and Creation using Spreadsheets	Michael Lee Mentor Graphics	Oct 2006 Mentor Graphics Technical Library
VHDL Coding Style to Infer LatticeECP2 sysDSP Blocks with Precision	Troy Scott Mentor Graphics	Oct 2006 Mentor Graphics Technical Library
Adding Value to Hardware and Reference Designs Using Software	Steve Breuning Mentor Graphics	Oct 2006 Mentor Graphics Technical Library
An Approach to Profiling	Tim Weller Mentor Graphics	Oct 2006 Mentor Graphics Technical Library
Are You Losing Your Memory?	Tracy Whatley Mentor Graphics	Oct 2006 Mentor Graphics Technical Library
Smart Homes	Jerry Reeves Mentor Graphics	Oct 2006 Mentor Graphics Technical Library
Abstracting Device Driver Code for Efficient Porting, Testing & Code Reuse	Lloyd Bela Mentor Graphics	Oct 2006 Mentor Graphics Technical Library
Mini-Baja Traction Control System-Mechatronics Modeling	Mike Donnelly and Matt Knudson Mentor Graphics and OSU	Oct 2006 Mentor Graphics Technical Library
Is SystemVerilog Only for System-Level Design	Douang Phanthavong Mentor Graphics	Sep 2006 Mentor Graphics Technical Library
Topology Planning and Routing	Mentor Graphics	Sep 2006 Mentor Graphics Technical Library
Illumination optimization for 65nm technology node	Ching-HengWang, Chi-Yuan Hung, and Qingwei Liu, Liguo Zhang Semiconductor Manufacturing International, Mentor Graphics	Sep 2006 Mentor Graphics Technical Library
Present challenges and solutions in sampling and correction for 45nm	Ioana Graur, Mohamed Al-Imam and Pat LaCour IBM, Mentor Graphics	Sep 22, 2006 Mentor Graphics Technical Library
The effect of OPC optical and resist model parameters on the model accuracy, run-time and stability	Amr Abdo, James Oberschmidt, Scott Mansfield, and Mohamed Talbi, Rami Fathy and Ahmed Seoud IBM, Mentor Graphics	Sep 2006 Mentor Graphics Technical Library
Integrated DFM Framework for Dynamic Yield Optimization	Fedor Pikus Mentor Graphics	Sep 2006 Mentor Graphics Technical Library
An effective layout optimization method via LFD concept	Ching-Heng Wang and Zexi Deng,Chi-Yuan Hung, Gensheng Gao Semiconductor Manufacturing International , Tsing-Hua University, Mentor Graphics	Sep 2006 Mentor Graphics Technical Library
No-forbidden-pitch SRAF rules for advanced contact lithography	Ching-HengWang, Chi-Yuan Hung and Qingwei Liu, Liguo Zhang Semiconductor Manufacturing International, Mentor Graphics	Sep 2006 Mentor Graphics Technical Library
DRC in the Nanometer Era	James Paris Mentor Graphics	Sep 21, 2006 Mentor Graphics Technical Library
Nucleus POS Demonstration	Asad Akbar Mentor Graphics	Sep 20, 2006 Mentor Graphics Technical Library
LVDT/RVDT Sensor Modeling and Signal Conditioning Design	Mike Donnelly Mentor Graphics	Sep 19, 2006 Mentor Graphics Technical Library
Innovations in Embedded Compiler Technology: Fine-Grained Allocation	Antonio Bigazzi Mentor Graphics	Sep 2006 Mentor Graphics Technical Library
Devious or Just Very Smart	Colin Walls Mentor Graphics	Sep 2006 Mentor Graphics Technical Library
System-level Validation Increases Design Productivity and Saves Errors	Bill Chown Mentor Graphics	Sep 2006 ARM IQ Article
Dynamic Clock Disable in PolarPro Devices	Mentor Graphics	Aug 29, 2006 Mentor Graphics Technical Library
Addressing Integration Problems in a Complex FPGA/PCB/High-Speed Design Environment Using the PADS Flow	John Peloso Mentor Graphics	Aug 03, 2006 Mentor Graphics Technical Library
To Interleave, or Not to Interleave: That is the Question	Patrick Carrier Mentor Graphics	Jul 2006 Xcell Journal Article
Accelerating Design Closure with Assertion-Based Verification	Ping Yeung and Darren Zacher Mentor Graphics	Jul 26, 2006 Mentor Graphics Technical Library
The Ultimate System Integration Platform: Virtex-5 and ISE 8.2i	Lee Hansen Mentor Graphics	Jul 26, 2006 Mentor Graphics Technical Library
Evolution of the Calibre Architecture	John Ferguson Mentor Graphics	Jul 25, 2006 Mentor Graphics Technical Library
As In AOP So In OOP: A Transition Guide to SystemVerilog for the eUser	Raghu Ardeishar and Allan Crone Mentor Graphics	Jul 13, 2006 Mentor Graphics Technical Library
Model-Based Insertion of Assist Features Using Pixel Inverstion Method: Implementation in 65nm Node	Chi-Yuan Hung, Qingwei Liu and Shumay D. Shang and Yuri Granik Semiconductor Manufacturing International Corporation and Mentor Graphics	Jul 11, 2006 Mentor Graphics Technical Library
A New Approach to Sign-Off	Anthony Nicoli Mentor Graphics	Jul 07, 2006 Mentor Graphics Technical Library
Power of a Platform in the Nanometer Era	Jeff Wilson Mentor Graphics	Jul 06, 2006 Mentor Graphics Technical Library
Developing an Effective Methodology for Checking RTL	Tom Dewey Mentor Graphics	Jun 29, 2006 Mentor Graphics Technical Library
When FPGA I/O Design Becomes a Necessity	Rick Stroot Mentor Graphics	Jun 29, 2006 Mentor Graphics Technical Library
System-level Validation Increases Design Productivity and Saves Errors	Bill Chown Mentor Graphics	Jun 22, 2006 Mentor Graphics Technical Library
Computation of parasitic capacitances of an IC cell in accounting for photolithography effect	Zhuoxiang Ren, Weidong Zhang, and Jim Falbo Mentor Graphics	Jun 22, 2006 Mentor Graphics Technical Library
Confronting Automotive Complexity	Enrique Ortega, Thomas Heurung, Nick Smith, and Russ Swanson Mentor Graphics	Jun 16, 2006 Mentor Graphics Technical Library
RoHS—Impact on Electronic Development	Josef Club Mentor Graphics	Jun 01, 2006 Mentor Graphics Technical Library
Phase-Locked Loop Simulation with Modulated Stead-State Analysis	David Cartalade Mentor Graphics	May 30, 2006 Mentor Graphics Technical Library
Using FormalPro for Xilinx Verification in a Precision RTL Flow	Troy Garrett Mentor Graphics	May 30, 2006 Mentor Graphics Technical Library
Using FormalPro for Xilinx Verification in a Synplify-Pro Flow	Troy Garrett Mentor Graphics	May 30, 2006 Mentor Graphics Technical Library
An Integrated Design Flow for ASIC Prototyping and Production	Patrick Fasang and Ro Chawla Mentor Graphics	May 24, 2006 Mentor Graphics Technical Library
The Mentor Graphics 0-In Formal Verification Technology Backgrounder	L. Curtis Widdoes Jr. Mentor Graphics	May 22, 2006 Mentor Graphics Technical Library
Building the Ultimate Test Harness for Network Devices	Madison Turner Mentor Graphics	May 19, 2006 Mentor Graphics Technical Library
Model-Driven Development for Embedded Systems Using the EDGE UML Suite	Alasdar Mullarney Mentor Graphics	May 16, 2006 Mentor Graphics Technical Library
Integrating Functional Formal Verification Into Your Flow	Harry Foster Mentor Graphics	May 15, 2006 Mentor Graphics Technical Library
Nucleus 802.11i: Enhanced Security for IEEE 802.11 Wireless Ethernet Networks	Iftikhar Zubair, Tammy Leino and Uriah Pollock Mentor Graphics	May 07, 2006 Mentor Graphics Technical Library
Interconnect Loss Budgeting for RocketIO Transceivers	Bill Hargin Mentor Graphics	Apr 2006 Xcell Journal Article
A Fundamentally Different Approach to FPGA I/O Design	Bruce Riggins Xilinx	Apr 2006 Xcell Journal Article
In-Vehicle Network Design Methodology	Thomas Heurung Mentor Graphics	Apr 27, 2006 Mentor Graphics Technical Library
Nucleus 802.1X SUP: Controlling Network Access Through Port-Based Authentication	Bilal Ahmed, Tammy Leino and Uriah Pollock Mentor Graphics	Apr 26, 2006 Mentor Graphics Technical Library
The Changing Face of Re-usable IP	John Wilson Mentor Graphics	Apr 18, 2006 Mentor Graphics Technical Library
A novel approach for full chip SRAF printability check	Liguo Zhang, Chi-Yuan Hung and Qingwei Liu Mentor Graphics and Semiconductor Manufacturing International	Apr 12, 2006 Mentor Graphics Technical Library
A methodology to take LER effect into OPC modeling algorithm	Liguo Zhang , Chi-Yuan Hung, Qingwei Liu, and Zexi Deng Mentor Graphics and Semiconductor Manufacturing International	Apr 12, 2006 Mentor Graphics Technical Library
Process Window OPC for Reduced Process Variability and Enhanced Yield	Mohamed Al-Imam and Hesham Maaty, Azalia Krasnoperova1, James A. Culp, Ioana Graur, and Scott Mansfield IBM and Mentor Graphics	Apr 12, 2006 Mentor Graphics Technical Library
Robust Double Exposure Flow for Memory	JW Park, Sungsoo Shu, Insung Kim, and Youngsuk Kang Mentor Graphics and Samsung	Apr 11, 2006 Mentor Graphics Technical Library
Dense OPC and verification for 45nm	Nicolas Cobb and Dragos Dudau Mentor Graphics	Apr 11, 2006 Mentor Graphics Technical Library
From UML to Embedded System: Is It Possible?	Stephen Mellor Mentor Graphics	Apr 07, 2006 2006 Embedded Systems Conference Paper
Confronting Complexity	Enrique Ortega, Thomas Heurung, Nick Smith, and Russ Swanson Mentor Graphics	Apr 04, 2006 Mentor Graphics Technical Library
Further Reducing the High Cost of Processing Power	John Ferguson, Doug Morgan, and Ramesh Joginpalli Mentor Graphics and AMD	Mar 29, 2006 Mentor Graphics Technical Library
Should You Reuse RTL	Tom Dewey Mentor Graphics	Mar 29, 2006 Mentor Graphics Technical Library
Using Phase Mask Algorithms to Direct Self Assembly	Frank Schellenberg and Andres Torres Mentor Graphics	Mar 29, 2006 Mentor Graphics Technical Library
Reticle Enhancement Verification for the 65nm and 45nm Node	Kevin Lucas, Kyle Patterson, Robert Boone and Corinne Miramond, Freescale Semiconductor Amandine Borjon and Jerome Belledent, ST Microelectronics	Mar 29, 2006 Mentor Graphics Technical Library
Line End Optimization through Optical Proximity Correction (OPC)-A Case Study	Dyiann Cho, Mentor Graphics Ken McAllister, Infineon Technologies	Mar 29, 2006 Mentor Graphics Technical Library
OPC to Improve Lithographic Process Window	James Word and Kyohei Sakajiri Mentor Graphics	Mar 29, 2006 Mentor Graphics Technical Library
Towards Full-chip Prediction of Yield-Limiting Contact Patterning Failure: Correlation of Simulated Image Parameters to Advanced Contact Metrology Metrics	John L. Sturtevant and Dyiann Chou Mentor Graphics	Mar 29, 2006 Mentor Graphics Technical Library
Intensive 2D SEM model calibration for 45nm and beyond	George E. Bailey, Thuy Do and Yuri Granik, Ir Kusnadi and Andrew Estroff Mentor Graphics and IMEC	Mar 29, 2006 Mentor Graphics Technical Library
Through-Process Modeling in a DfM Environment	Mohamed Al-Imam and Rami Fathy IBM Microelectronics and Mentor Graphics	Mar 29, 2006 Mentor Graphics Technical Library
Improvements in Post-OPC Data Constraints for Enhanced Process Corrections	Pat LaCour, Ayman Yehia, Kareem Madkour, Mohamed Gheith and Ahmed Seoud, Ryan L. Burns, Yuping Cui, Zengqin Zhao and Ian Stobert IBM and Mentor Graphics	Mar 29, 2006 Mentor Graphics Technical Library
Application of CM0 Resist Model to OPC and Verification	Yuri Granik, Nick Cobb, and Dmitry Medvedev Mentor Graphics	Mar 29, 2006 Mentor Graphics Technical Library
Impact of Process Variation on 65nm Across-Chip Linewidth Variation	Le Hong, Travis Brist, Pat LaCour, John Sturtevant and Martin Niehoff, Philipp Niedermaier Mentor Graphics and Infineon Technologies	Mar 29, 2006 Mentor Graphics Technical Library
The Influence of Calibration Pattern Coverage for Lumped Parameter Resist Models on OPC Convergence	Martin Niehoff, Shumay Shang, and Olivier Toublan Mentor Graphics	Mar 29, 2006 Mentor Graphics Technical Library
Modular FPGA Design with Precision RTL Synthesis and ispLEVER	Troy Scott Lattice Semiconductor	Mar 28, 2006 Mentor Graphics Technical Library
Distributed Autorouting Using XtremeAR	Prashant B. Patil Mentor Graphics	Mar 27, 2006 Mentor Graphics Technical Library
Litho-Friendly Design: Capturing Process Variability for the Design Flow	Jean-Marie Brunet Mentor Graphics	Mar 23, 2006 Mentor Graphics Technical Library
The Need for an Automated Clock Domain Crossing Verification Solution	Neil Hand Mentor Graphics	Mar 23, 2006 Mentor Graphics Technical Library
Deflecting the Design Diversity Dilemma: Methods for Improving Mixed-Signal Post-Layout Analysis in an SoC Flow	Claudia Relyea Mentor Graphics	Mar 20, 2006
Implementation of Adaptive Site Optimization in Model-based OPC for Minimizing Ripples	M. Bahnas, M. Al-Imam, A. Seoud, P. LaCour and H.F. Ragai Mentor Graphics, Ain Shams University	Mar 20, 2006 Mentor Graphics Technical Library
The Effect of Calibration Feature Weighting on OPC Optical and Resist Models	Amr Abdo, James Oberschmidt, Daniel Fischer, and Mohamed Talbi: IBM Corporation Rami Fathy and Kareem Madkour: Mentor Graphics IBM and Mentor Graphics	Mar 13, 2006 Mentor Graphics Technical Library
Nucleus MTP: Media Transfer Protocol Support for Digital Media Devices	CC Hung Mentor Graphics	Mar 01, 2006 Mentor Graphics Technical Library
C++ for Embedded: Dos and Don'ts	Colin Walls Mentor Graphics	Mar 01, 2006 Mentor Graphics Technical Library
Model-based Development Environments	Stephen Mellor Mentor Graphics	Mar 01, 2006 Mentor Graphics Technical Library
The Value of Combining Processor-Driven Testbenches with Traditional HDL Testbenches	Jim Kenney Mentor Graphics	Feb 28, 2006 Mentor Graphics Technical Library
Meeting Performance Specifications and Ensuring Optimal System Functionality in SoC Designs	German Pagnucco Mentor Graphics	Feb 24, 2006 Mentor Graphics Technical Library
Techniques for Integrating Mini-Disk Drive Technology into Embedded Applications	Craig Frey Mentor Graphics	Feb 23, 2006 Mentor Graphics Technical Library
Nucleus Dynamic Download	Todd Brian, Mike Manning, Nucleus Kernal and Nucleus Dynamic	Feb 22, 2006 Mentor Graphics Technical Library
Embedded Software Drives Future Consumer Applications: Digital Home	CC Hung, Accelerated Technology Richard Schmitt, Blue Peach Accelerated Technology and Blue Peach	Feb 21, 2006 Mentor Graphics Technical Library
Advanced Testing Methods for Automotive Software	Madison Turner Mentor Graphics	Feb 21, 2006 Mentor Graphics Technical Library
Object-Orientation in Embedded Software Development Using Nucleus C++	Todd Brian Mentor Graphics	Feb 01, 2006 Mentor Graphics Technical Library
Successful DDR2 Design	Steve McKinney Mentor Graphics	Jan 30, 2006 Xcell Journal Article
Nucleus PictBridge: Direct Printing from Digital Camera to Printer over USB	CC Hung Mentor Graphics	Jan 30, 2006 Mentor Graphics Technical Library
Post-Layout Analysis with Eldo and Eldo RF	Marius Sida Mentor Graphics	Jan 27, 2006 Mentor Graphics Technical Library
Extending PCI Capabilities in Embedded Systems Using Nucleus PCI-X	Vikram Siddamsetty Mentor Graphics	Jan 20, 2006 Mentor Graphics Technical Library
Controller Area Network for Automotive and Automation Industry	Kaleem Anwar Mentor Graphics	Jan 18, 2006 Mentor Graphics Technical Library
Advancing Embedded Systems Integration Using Nucleus PCI	Vikram Siddamsetty Mentor Graphics	Jan 17, 2006 Mentor Graphics Technical Library
Using Nucleus POSIX for Improving Application Development Time in Embedded Systems	Todd Brian and Thomas Sumardi Mentor Graphics	Jan 17, 2006 Mentor Graphics Technical Library
Nucleus SHELL for Interactive Terminal Applications	Bryan Whatley Nucleus Kernels and Middleware Nucleus , Mentor Graphics, and Middleware	Jan 16, 2006 Mentor Graphics Technical Library
Nucleus uiPLUS: Improving Application Portability Using Real-Time Operating Systems Implemented With uITRON 4.0 Specifications	Bryan Whatley Nucleus Kernels and Middleware	Jan 16, 2006 Mentor Graphics Technical Library
Physical Optimization Algorithms for Efficient Timing Closure	Peter Suaris and Nan-Chi Chou Mentor Graphics	Jan 09, 2006 Mentor Graphics Technical Library
Precision RTL Synthesis Flow for QuickLogic Devices	Actel	Jan 05, 2006 Mentor Graphics Technical Library
Mobile Audio: An Introduction to Mobile Audio Technical Standards and Market Requirements	Gavin Bourne, CC Hung Beatnik and Accelerated Technology	Jan 05, 2006 Mentor Graphics Technical Library
Optimizing DSP Performance in FPGAs	Patrick Fasang Altera	Jan 05, 2006 Mentor Graphics Technical Library
Using Register Retiming to Optimize Your FPGA Designs	Darren Zacher Mentor Graphics	Jan 05, 2006 Mentor Graphics Technical Library
The Role of DMS in the PLIM Landscape	Mentor Graphics	Dec 21, 2005 Mentor Graphics Technical Library
Method for Incorporating Simultaneous Flows for Design for Manufacturing with Design For Reliability	Karen Chow, David Abercrombie, Mark Basel Mentor Graphics	Dec 12, 2005 Mentor Graphics Technical Library
Simplify Integrating CANopen Network Systems with Adaptable Nucleus CANopen Protocal Stack	Todd Brian Mentor Graphics	Dec 08, 2005 Mentor Graphics Technical Library
A Transaction Data Model for Storing and Retrieving Transaction Information	Mark Glasser Mentor Graphics	Dec 08, 2005 Mentor Graphics Technical Library
Improving Yield—Bridging Fault ATPG in FastScan and TestKompress with Net Pair Identification using Calibre	Mentor Graphics	Dec 06, 2005 Mentor Graphics Technical Library
Nucleus 802.11 STA	Uriah Pollock, Muhammad Salman, and Madison Turner Mentor Graphics	Dec 06, 2005 Mentor Graphics Technical Library
Nucleus WebServ	Uriah Pollock Mentor Graphics	Dec 06, 2005 Mentor Graphics Technical Library
Nucleus Integration with Xilinx FPGA System Design	Aaron Spear and Phillip Walker Accelerated Technology	Dec 01, 2005 Xcell Journal Article
Early Defect Discovery with Assertion-Based Verification Accelerates Design Closure	Ping Yeung and Darren Zacher Mentor Graphics	Dec 01, 2005 Xcell Journal Article
Automotive CAN Bus Signal Integrity Design	Mike Donnelly Mentor Graphics	Nov 30, 2005 Mentor Graphics Technical Library
Electrical and Mechanical Integration in Automotive and Aerospace Design	John Wilson Mentor Graphics	Nov 30, 2005 Mentor Graphics Technical Library
Electronic Product Development in the Global Enterprise	Mentor Graphics	Nov 28, 2005 Mentor Graphics Technical Library
PADS Integrated Solutions	Jim Oakley Mentor Graphics	Nov 21, 2005 Mentor Graphics Technical Library
Mechatronic System Modeling and Simulation Techniques	Darrell Teegarden and Scott Cooper Mentor Graphics	Nov 18, 2005 Mentor Graphics Technical Library
The Building Blocks of Security	Uriah Pollock Nucleus	Nov 03, 2005 Mentor Graphics Technical Library
Beyond Pass/Fail Testing: Using Failure Data from Manufacturing Test for Yield Monitoring and Learning	Mentor Graphics	Nov 02, 2005 Mentor Graphics Technical Library
At-Speed and Advanced Fault Models for Achieving High Quality Test	Mentor Graphics	Nov 02, 2005 Mentor Graphics Technical Library
Ensuring Serial Protocol Signal Integrity with FPGAs and Embedded Transceivers	Bob Blake Altera	Oct 26, 2005 Mentor Graphics Technical Library
Optimization Techniques for Efficient Implementation of DSP in FPGAs	Douang Phanthavong, Manish Bansal, Mandar Chitnis, and D.J. Wang Mentor Graphics	Oct 26, 2005 Mentor Graphics Technical Library
The Evolution in Disk-Drive Storage: How Consumer Electronic Storage Devices will Drive Future Growth	James Venable Mentor Graphics	Oct 26, 2005 Mentor Graphics Technical Library
Using CVS for version management in HDL Designer Series	Ananda Arasu Mentor Graphics	Oct 13, 2005 Mentor Graphics Technical Library
A Tutorial on using Precision Synthesis for Lattice Devices	Lattice Corporation	Sep 27, 2005 Mentor Graphics Technical Library
Setting up HDL Designer for Team-based Design	Robert Jeffery Mentor Graphics	Sep 26, 2005 Mentor Graphics Technical Library
System Modeling: An Introduction	Scott Cooper Mentor Graphics	Sep 20, 2005 Mentor Graphics Technical Library
C++ at the Embedded Sharp End	Colin Walls Mentor Graphics	Sep 15, 2005 2005 ESC Boston Paper
Virtual Private Networking (VPN) for Embedded Devices: L2TP Explained	Wasif Basharat, Tammy Leino, and Madison Turner Mentor Graphics	Sep 14, 2005 Mentor Graphics Technical Library
Assertion-Based Verification for ARM-based SoC Design	Ping Yeung Mentor Graphics	Sep 13, 2005 Mentor Graphics Technical Library
Crosstalk Coupling: Single-Ended vs. Differential	Douglas Brooks UltraCAD Design	Sep 08, 2005 Mentor Graphics Technical Library
Design Flows Using TestKompress	Mentor Graphics	Sep 07, 2005 Mentor Graphics Technical Library
Realizing Advanced Functional Verification with Questa	Tom Fitzpatrick Mentor Graphics	Sep 02, 2005 Mentor Graphics Technical Library
Turning New Ideas into Reality using FPGAs and Structured ASICs	Ro Chawla Altera	Aug 30, 2005 Mentor Graphics Technical Library
Using Revision Control in HDL Designer Series	Mentor Graphics	Aug 30, 2005 Mentor Graphics Technical Library
Tower Semiconductor Success: Calibre OPC	Olivier Toublan, Peter Nikolsky Mentor Graphics and Tower Semiconductor	Aug 22, 2005 Mentor Graphics Technical Library
Autorouting in Stages	Yan Killy Mentor Graphics	Aug 18, 2005 Mentor Graphics Technical Library
Via Doubling to Improve Yield	Walter Ng Chartered Semiconductor	Aug 09, 2005 Mentor Graphics Technical Library
Nucleus USB Overview	CC Hung Mentor Graphics	Aug 01, 2005 Mentor Graphics Technical Library
Performance at What Price? Taking Stock of the Need for Speed in Physical Verification	John Ferguson and Doug Morgan Mentor Graphics	Aug 01, 2005 Mentor Graphics Technical Library
Automating Systems Integration and Electrical Distribution in Modern Car Platforms	Martin O'Brien Mentor Graphics	Jul 27, 2005 Mentor Graphics Technical Library
Accelerating Functional Simulation for Processor Based Designs	Russell Klein and Tomasz Piekarz Mentor Graphics	Jul 27, 2005 Mentor Graphics Technical Library
Managing Signal Integrity: Being Heard Above the Noise	Steve Sharp and Panch Chandrasekaran Xilinx	Jul 25, 2005 Mentor Graphics Technical Library
Advanced Project Management with Precision Synthesis	Greg Silcox Mentor Graphics	Jul 25, 2005 Mentor Graphics Technical Library
Ptolemy-Oriented Structural, Reconfigurable, and Heterogeneous Hardware Design, Verification and Synthesis	Mohamed A. Salem Mentor Graphics	Jul 22, 2005 Mentor Graphics Technical Library
Using Standards to Build a Stable Framework for Product and Market Development	John Wilson Mentor Graphics	Jul 20, 2005 Mentor Graphics Technical Library
Modeling and Simulating a ZigBee Wireless Transmitter Path using ADMS RF	Cyril Descleves Mentor Graphics	Jul 19, 2005 Mentor Graphics Technical Library
Losing Less from Lossy Lines	Bill Hargin Mentor Graphics	Jul 11, 2005 Xcell Journal Article
Hardware/Software Co-Verification	Ross Nelson Mentor Graphics	Jul 11, 2005 Xcell Journal Article
Improving Verification Coverage of ARM SoCs While Reducing Simulation Runtime	Jim Kenney Mentor Graphics	Jul 2005 ARM IQ Article
Integrated Circuit DFM Framework for Deep Subwavelength Processes	A. Torres, C. N. Berglund Mentor Graphics, Oregon Health Sciences University	Jun 30, 2005 Mentor Graphics Technical Library
Advanced Layout Fragmentation and Simulation Schemes for Model Based OPC	James Word, Andes Torres, and Pat LaCour Mentor Graphics	Jun 30, 2005 Mentor Graphics Technical Library
Assessing the Impact of Real World Lithography Variation	John L. Sturtevant, J. Word, P. LaCour, J. W. Park, and D. Smith Mentor Graphics	Jun 30, 2005 Mentor Graphics Technical Library
Polarization of Influences Through the Optical Path	George E. Bailey and Kostas Adam Mentor Graphics	Jun 30, 2005 Mentor Graphics Technical Library
High Accuracy 65nm OPC Verification: Full Process Window Model vs. Critical Failure ORC	Shumay D. Shang and Olivier Toublan, Amandine Borjon, Jerome Belledent, Christophe Couderc, Yves Rody, Frank Sundermann, Jean-Christophe Urbani, Stanislas Baron, Corinne Miramond, Kyle Patterson and Kevin Lucas, Yorick Trouiller and Patrick Schiavone Mentor Graphics, Philips Semiconductors, STMicroelectronics, Freescale Semiconductor, LETI-CEA	Jun 30, 2005 Mentor Graphics Technical Library
Assessment of Complementary Double Dipole Lithography for 45nm and 32nm Technologies	Andres Torres and Olivier Toublan, Daniel Henry, Sergei V. Postnikov, Kyle Patterson, and Scott Warrick, Philippe Thony Mentor Graphics, STMicroelectronics, Freescale Semiconductor, CEA-LETI	Jun 30, 2005 Mentor Graphics Technical Library
Illumination Optimization Effects on OPC and MDP	Travis E Brist and Steffen Schulze Mentor Graphics	Jun 29, 2005 Mentor Graphics Technical Library
The Prospects for Hierarchical Data Processing with Growing Complexity of the Post-Tapeout Flow	Steffen Schulze and Emile Sahouria Mentor Graphics	Jun 29, 2005 Mentor Graphics Technical Library
Modeling of Electromagnetic Effects from Mask Topography at Full-Chip Scale	Konstantinos Adam Mentor Graphics	Jun 29, 2005 Mentor Graphics Technical Library
Considerations for the Use of Defocus Models for OPC	John L. Sturtevant, J. A. Torres, J. Word, Y. Granik, and P. LaCour Mentor Graphics	Jun 29, 2005 Mentor Graphics Technical Library
Full Chip Model Based Correction of Flare-Induced Linewidth Variation	James Word, Yuri Granik, and Olivier Toublan, Jerome Belledent, Yorick Trouillerc, Wilhelm Maurer Mentor Graphics, Philips Semiconductors, STMicroelectronics, Infineon Technologies	Jun 29, 2005 Mentor Graphics Technical Library
Layout Compensation for EUV Flare	Franklin M. Schellenberg, James Word, and Olivier Toublan Mentor Graphics	Jun 29, 2005 Mentor Graphics Technical Library
Solving Inverse Problems of Optical Microlithography	Yuri Granik Mentor Graphics	Jun 29, 2005 Mentor Graphics Technical Library
System Prototyping: The Nucleus SIMdx Environment	Sami Petajasoja Mentor Graphics	Jun 21, 2005 Mentor Graphics Technical Library
Prevent Costly Design Iterations by Checking HDL Code Early in the FPGA/ASIC Design Cycle	Michael Lee Mentor Graphics	Jun 16, 2005 Mentor Graphics Technical Library
Nucleus IPsec	Uriah Pollock Mentor Graphics	Jun 15, 2005 Mentor Graphics Technical Library
Field Update FPGAs While System Operates	Gordon Hands Lattice Semiconductor	May 31, 2005 Mentor Graphics Technical Library
Binding SystemVerilog to VHDL Components Using Questa	Allan Crone Mentor Graphics	May 27, 2005 Mentor Graphics Technical Library
Software Incremental Compilation Technology Speeds Design Turnaround Times	Robert Kruger Altera	May 25, 2005 Mentor Graphics Technical Library
Practical Reuse: A 180-degree Perspective Shift	Tom Dewey Mentor Graphics	May 20, 2005 Mentor Graphics Technical Library
Optimize Pin Assignments Using I/O Designer and Precision Synthesis	Ron Plyler Mentor Graphics	May 20, 2005 Mentor Graphics Technical Library
Recent Improvements in Electronic Design Data Migration	Michael Griesbach Mentor Graphics	May 11, 2005 Mentor Graphics Technical Library
Reconfigurable System on a Programmable Chip Platform	M. Danek, P. Honzek, J. Kadlec, R. Matousek, and Z. Pohl Mentor Graphics	Apr 25, 2005 Mentor Graphics Technical Library
An Introduction to Nucleus SNMP	Uriah Pollock Mentor Graphics	Apr 12, 2005 Mentor Graphics Technical Library
Efficient Interprocessor Communications with Nucleus IPC	Madison Turner Mentor Graphics	Apr 12, 2005 Mentor Graphics Technical Library
Efficient Simulation Techniques for Modulated Delta-Sigma Fractional-N Synthesizers	Cyril Descleves Mentor Graphics	Apr 08, 2005 Mentor Graphics Technical Library
Using Precision Synthesis to Design with the XtremeDSP Slice in Virtex-4	Douang Phanthavong Mentor Graphics	Apr 07, 2005 Mentor Graphics Technical Library
Nucleus FILE: Embedded File Management System	CC Hung Mentor Graphics	Mar 31, 2005 Mentor Graphics Technical Library
An Introduction to the Nucleus USB Ethernet Communication Class	CC Hung Mentor Graphics	Mar 31, 2005 Mentor Graphics Technical Library
Further Reducing the High Cost of Processing Power	John Ferguson and Doug Morgan, Ramesh Joginpalli Mentor Graphics and AMD	Mar 29, 2005 Mentor Graphics Technical Library
Advanced ROM to RAM Inferencing in Precision Synthesis	Douang Phanthavong Mentor Graphics	Mar 24, 2005 Mentor Graphics Technical Library
Delivering Non-Volatility at Lower Cost in FPGAs	Lattice Semiconductor	Mar 24, 2005 Mentor Graphics Technical Library
Functional Verification Technology and Methodology Backgrounder	Tom Fitzpatrick Mentor Graphics	Mar 15, 2005 Mentor Graphics Technical Library
Today's Platform FPGA Systems Require a Proven Co-Verification Methodology	Milan Saini, Ross Nelson Xilinx and Mentor Graphics	Mar 14, 2005 Mentor Graphics Technical Library
Executable UML	Stephen Mellor Mentor Graphics	Mar 10, 2005 2005 Embedded Systems Conference
Building and Implementing Concurrent Specifications	Stephen Mellor and Cortland Starrett Mentor Graphics	Mar 10, 2005 2005 Embedded Systems Conference
Measuring and Tuning Real Time performance of Embedded Systems	Rajat Moona, Russell Klein IIT and Mentor Graphics	Mar 10, 2005 2005 Embedded Systems Conference
Seamless Co-Verification of ARM Processor-based SoCs	Tim Holden ARM	Mar 09, 2005 Mentor Graphics Technical Library
Providing a Comprehensive Design Flow for Successful FPGA-to-Structured ASIC Migration	King Ou and Rob Schreck Altera	Feb 28, 2005 Mentor Graphics Technical Library
Using Xilinx Embedded Processor Subsystems in the Precision Synthesis RTL Flow	Douang Phanthavong Mentor Graphics	Feb 17, 2005 Mentor Graphics Technical Library
Advanced Methods for Chip Finishing in Large Nanometer Designs	Brian Marshall, Branko Hoffmann and Menno Clerk Mentor Graphics and Philips Semiconductors	Feb 03, 2005 Mentor Graphics Technical Library
The Need for Advanced Silicon Modeling in RF Nanometer Designs	Karen Chow Mentor Graphics	Jan 31, 2005 Mentor Graphics Technical Library
Challenges to Silicon Modeling in the Nanometer Era	Carey Robertson Mentor Graphics	Jan 31, 2005 Mentor Graphics Technical Library
Design for Manufacturing: What Designers Need to Know About the Change in Yield Management	John Ferguson and David Abercrombie Mentor Graphics	Jan 31, 2005 Mentor Graphics Technical Library
Making Code Generation Real: Five Requirements for Effective Code Generation	Stephen J. Mellor Accelerated Technology	Jan 26, 2005 Mentor Graphics Technical Library
An Introduction to Executable and Translatable UML	Stephen J. Mellor Accelerated Technology	Jan 26, 2005 Mentor Graphics Technical Library
A Summary of Executable and Translatable UML	Stephen J. Mellor Accelerated Technology	Jan 26, 2005 Mentor Graphics Technical Library
FPGAs Drop Below Structured ASIC Prices	Gokul Krishnan and Balaji Thirumalai Xilinx	Jan 21, 2005 Mentor Graphics Technical Library
Towards Automating Hardware/Software Co-Design	M. W. El-Kharashi and A. Wahdan, M. H. El-Malaki, S. Hammad, and A. Salem Ain Shams University and Mentor Graphics Egypt	Jan 06, 2005 Mentor Graphics Technical Library
Migrating Software to Hardware on FPGAs	Rajat Moona Kanpur, Russell A. Klein Indian Institute of Technology and Mentor Graphics	Dec 28, 2004 Mentor Graphics Technical Library
An Introduction to Nucleus USB To RS232 Adapter Class Driver	CC Hung	Dec 21, 2004 Mentor Graphics Technical Library
Advanced Power Management Using Quartus II	Robert Kruger Altera	Dec 21, 2004 Mentor Graphics Technical Library
Using Xilinx UCF Constraints with Precision Synthesis	Dan DeVries	Dec 20, 2004 Mentor Graphics Technical Library
A Fully Automated Approach for Analog Circuit Reuse	Sherif Hammouda, Mohamed Dessouky, and Mohamed Tawfik, Wael Badawy Mentor Graphics and University of Calgary	Dec 09, 2004 Mentor Graphics Technical Library
Running Design Checks in Batch Mode	Tom Dewey	Dec 07, 2004 Mentor Graphics Technical Library
An Introduction to Nucleus USB Printer Class Driver and How It Works with USB Devices	CC Hung	Dec 03, 2004 Mentor Graphics Technical Library
Nucleus IPv6—The Solution for the Next Generation Internet	Uriah Pollock Mentor Graphics	Dec 02, 2004 Mentor Graphics Technical Library
Nucleus NET: A Formidable Challenger to Other Embedded TCP/IP Stacks	Glen Johnson	Dec 01, 2004 Mentor Graphics Technical Library
Nucleus PPP—A Complete VPN Solution	Uriah Pollock	Dec 01, 2004 Mentor Graphics Technical Library
Passing FCC/CISPR Tests: A Method to Build It Right the First Time	Terry Fox Terry Fox and Associates	Nov 30, 2004 Mentor Graphics Technical Library
Improving Productivity with Scripting	Oliver Tan Altera	Nov 29, 2004 Mentor Graphics Technical Library
SystemVision for Embedded Mechatronic Systems: Hardware Modeling	Tom Egel Mentor Graphics	Nov 23, 2004 Mentor Graphics Technical Library
Selecting a Quality IP Supplier: The VSIA QIP Metric and More	Mark Hepburn and Henry Lydick	Nov 18, 2004 Mentor Graphics Technical Library
The Platform Solution: Leveraging Calibre's Power of Integrated, High Performance Tools	Mentor Graphics	Nov 2004 Mentor Graphics Technical Library
The Four Pillars of Assertion-Based Verification	Ping Yeung	Nov 16, 2004 Mentor Graphics Technical Library
Switching from ASIC Design	Altera	Nov 11, 2004 Mentor Graphics Technical Library
Automated FSM Error Correction for Single Event Upsets	Nand Kumar and Darren Zacher Mentor Graphics	Nov 11, 2004 Mentor Graphics Technical Library
Dynamic Phase Alignment for Networking Applications	Tze Yi Yeoh Mentor Graphics	Nov 11, 2004 Mentor Graphics Technical Library
Measuring and Tuning Real Time Performance of Embedded Systems	Russell Klein, Rajat Moona Mentor Graphics and IIT Kanpur India	Nov 11, 2004 Mentor Graphics Technical Library
Introduction to ModelSim 6.0 Debug GUI	Mentor Graphics	Nov 03, 2004 Mentor Graphics Technical Library
SystemC Verification with ModelSim	Mentor Graphics	Nov 03, 2004 Mentor Graphics Technical Library
Operating in a Mixed-language Environment Using HDL, C/C++, SystemC and SystemVerilog	Mentor Graphics	Nov 03, 2004 Mentor Graphics Technical Library
FPGAs Go, Go, Go: Solving FPGA Timing Closure for High Speed Designs	Tom Dillon Dillon Engineering	Oct 27, 2004 Mentor Graphics Technical Library
Design Team Collaboration within a Modeling and Analysis Environment	Scott Cooper Mentor Graphics	Oct 22, 2004 Mentor Graphics Technical Library
Improving Collaboration in Automotive System Design	M. Donnelly Mentor Graphics	Oct 22, 2004 Mentor Graphics Technical Library
Nucleus Solutions for the OMAP Architecture	Madison Turner Mentor Graphics	Oct 19, 2004 Mentor Graphics Technical Library
SystemVision for Embedded Mechatronic Systems—an Overview	Tom Egel Mentor Graphics	Oct 19, 2004 Mentor Graphics Technical Library
Electron Transport Through Metal-Multiwall Carbon Nanotube Interfaces	Quoc Ngo, Shoba Krishnan, Alan M. Cassell, Qi Ye, and Jun Li, Dusan Petranovic Mentor Graphics, IEEE	Oct 15, 2004 Mentor Graphics Technical Library
Seamless CVE from Mentor Graphics Speeds Verification for Xilinx Virtex-4 and Virtex-II Pro FPGAs with Embedded IBM PowerPC Processors	Milan Saini Xilinx	Oct 15, 2004 Mentor Graphics Technical Library
The Platform Solution: Leveraging Calibre's Power of Integrated, High Performance Tools	Mentor Graphics	Oct 15, 2004 Mentor Graphics Technical Library
Memory Inference with Precision Synthesis	Douang Phanthavong and Ron Plyler	Oct 10, 2004 Mentor Graphics Technical Library
Software as Assets	Stephen J. Mellor Accelerated Technology	Oct 2004 Embedded Computing Design Article
Verification Flow in Model-Based Design	Stephen Mellor and Colin Walls Mentor Graphics	Sep 16, 2004 2004 ESC Boston Paper
Productivity Unleashed: IP Meets XML	Chris Lennard, John Wilson, Marino Strik ARM, Mentor Graphics, and Philips Semiconductor	Aug 28, 2004 ARM IQ Article
Placement Reuse Flow Helps Engineering Change Management	Dan DeVries Mentor Graphics	Aug 25, 2004 Mentor Graphics Technical Library
SystemVerilog Versus OpenVera	Stephen Bailey Model Technology	Aug 23, 2004 Mentor Graphics Technical Library
The Need for a Scalable Verification Methodology to Overcome the Limitations of Current Verification Approaches	Brian Bailey Mentor Graphics	Aug 09, 2004 Mentor Graphics Technical Library
New Catapult C Design Flow is an Unqualified Success	Dennis McCain Nokia Research Center	Aug 01, 2004 Mentor Graphics Technical Library
Catapult C Synthesis-Based Design Flow: Speeding Implementation and Increasing Flexibility	Shawn McCloud Mentor Graphics	Aug 01, 2004 Mentor Graphics Technical Library
Benefits of Outsourcing Rule Decks	Bill Martin Mentor Graphics	Aug 01, 2004 Mentor Graphics Technical Library
Using LeonardoSpectrum and Precision Synthesis Tools with Xilinx Platform Studio	Milan Saini Xilinx	Aug 01, 2004 Mentor Graphics Technical Library
Catapult C Synthesis Addresses RTL Bottleneck in Ericsson's ASIC Design Flow	Peter Nord Ericsson Mobile Platforms	Aug 01, 2004 Mentor Graphics Technical Library
OASIS-Based Unification of Mask Data Representation	Steffen Schulze and E. Sahouria Mentor Graphics	Aug 01, 2004 Mentor Graphics Technical Library
The Need for a Scalable Verification Methodology to Overcome the Limitations of Current Verification Approaches	Brian Bailey Mentor Graphics	Aug 01, 2004 Mentor Graphics Technical Library
Library Management Methodology	Jerry Kurtze Mentor Graphics	Aug 01, 2004 Mentor Graphics Technical Library
Parasitic Effects, Nanometer Silicon Modeling and Calibre xRC	Carey Robertson Mentor Graphics	Aug 01, 2004 Mentor Graphics Technical Library
Cyclone II FPGAs: Higher Density, More Features at Lower Cost	Carlos Nieves Altera Corporation	Aug 01, 2004 Mentor Graphics Technical Library
I/O Designer — Uniting Disparate HDL, FPGA and PCB Design Flows	David Brady and Rick Stroot Mentor Graphics	Aug 01, 2004 Mentor Graphics Technical Library
Simultaneous Design Technology: A Revolution	Charles Pfeil Mentor Graphics	Aug 01, 2004 Mentor Graphics Technical Library
PADS Router — Setting the Standard for Power and Ease of Use	Todd Hendren Mentor Graphics	Aug 01, 2004 Mentor Graphics Technical Library
Uniting Disparate HDL, FPGA and PCB Design Flows	David Brady and Rick Stroot Mentor Graphics	Aug 01, 2004 Mentor Graphics Technical Library
An Overview of the Nucleus USB Family of Products	C.C. Hung Mentor Graphics	Aug 01, 2004 Mentor Graphics Technical Library
Benefits of Outsourcing Rule Decks	Bill Martin Mentor Graphics	Jun 01, 2004 Mentor Graphics Technical Library
Design Methodology Guidelines	Douang Phanthavong Mentor Graphics	Jun 01, 2004 Mentor Graphics Technical Library
Precision RTL Synthesis Supports Clock Propagation Across DCMs/DLLs	Douang Phanthavong Mentor Graphics	Jun 01, 2004 Mentor Graphics Technical Library
An Agile Mask Data Preparation and Writer Dispatching Approach	Steffen Schulze, Chih-tung Hsu, Y.S. Chen, S.C. Hsin, and L.C. Huo Mentor Graphics and TSMC	Jun 01, 2004 Mentor Graphics Technical Library
Rapid Design, Verification, and Optimization of ARM Technology-Based Embedded Systems	Jim Kenney Mentor Graphics	May 25, 2004 ARM IQ Article
Easy to Design Solutions for Board Management Functions	Alix Coxon Altera	May 10, 2004 Mentor Graphics Technical Library
Regression Testing: Gate-Level Functional Verification Is Imperative and Equivalence Checking Provides the Solution	Ian Burgess Mentor Graphics	May 10, 2004 Mentor Graphics Technical Library
DFM: Magic Bullet or Marketing Hype	Joseph Sawicki Mentor Graphics	May 10, 2004 Mentor Graphics Technical Library
Evaluation of IDEALSmile for 90 nm FLASH Memory Contact Holes Imaging with ArF Scanner	Junji Iwasa, Kenji Saitoh, Kenji Yamazoe, and Yasuo Hasegawa, O. Toublan, Annalisa Pepe, Gianfranco Capetti, Marco Lupo, Pietro Cantu, and Sara Loi Canon, Mentor Graphics, and STMicroelectronics	May 10, 2004 Mentor Graphics Technical Library
Calibre MTflex: Reducing the High Cost of Processing Power	John Ferguson Mentor Graphics	May 10, 2004 Mentor Graphics Technical Library
DFM: What Is It and What Will It Do?	Joseph Sawicki Mentor Graphics	May 10, 2004 Mentor Graphics Technical Library
C++ Under the Hood	Microtec	Apr 29, 2004 Mentor Graphics Technical Library
DHCP Debugging Tips	Dan Schiro Mentor Graphics	Apr 01, 2004 Mentor Graphics Technical Library
Shifting Methods: Adopting a Design for Manufacture Flow	John Ferguson Mentor Graphics	Apr 01, 2004 Mentor Graphics Technical Library
The Necessary Link for Design Closure: LVS-Parasitic Extraction	John Ferguson Mentor Graphics	Apr 01, 2004 Mentor Graphics Technical Library
Resistance Matrix in Crosstalk Modeling for Multiconductor Systems	Dusan Petranovic Mentor Graphics	Apr 01, 2004 Mentor Graphics Technical Library
Resolution Enhancement Technology: The Past, the Present, and Extensions for the Future	F.M. Schellenberg Mentor Graphics	Apr 01, 2004 Mentor Graphics Technical Library
Using Physical Synthesis to Improve FPGA Performance	Anil Khanna and Rich Faris Mentor Graphics	Apr 01, 2004 Mentor Graphics Technical Library
Creating High-Speed Memory Interfaces with Virtex-II and Virtex-II Pro FPGAs	Maria George and Nagesh Gupta Xilinx	Apr 01, 2004 Mentor Graphics Technical Library
Detailed Process Analysis for Sub-Resolution Assist Features Introduction	Andreas Torsy, Rainer Zimmermann and Jens Hassmann, O. Toublan and Harry Smyth Altis Semiconductor, Infineon Technologies, Mentor Graphics	Apr 01, 2004 Mentor Graphics Technical Library
OASIS-Based Data Preparation Flows: Progress Report on Containing Data Size Explosion	Nick Cobb and Yuri Granik Mentor Graphics	Apr 01, 2004 Mentor Graphics Technical Library
Combining OPC and Design for Printability into 65nm Logic Designs	O. Toublan, Kevin Lucas, Chi-Min Yuan, Robert Boone, Kirk Strozewski, Jason Porter, Ruiqi Tian, Karl Wimmer, Jonathan Cobb, and Bill Wilkinson Mentor Graphics and Motorola	Apr 01, 2004 Mentor Graphics Technical Library
Critical Failure ORC—Application to the 90-nm and 65-nm Nodes	O. Toublan and Shumay Shang, Kyle Patterson, Y.Rody, Jerome Belledent, and Christophe Couderc, Corinne Miramond and Frank Sundermann Mentor Graphics, Motorola, Philips Semiconductors, STMicroelectronics	Apr 01, 2004 Mentor Graphics Technical Library
Interaction of RET and MDP: Optimization for Reducing the Mask Writing Time	Steffen Schulze and James Word Mentor Graphics	Apr 01, 2004 Mentor Graphics Technical Library
Model-Based Prediction of Full-Chip SRAF Printability	Suihua Zhu, James Word Integrated Device Technology and Mentor Graphics	Apr 01, 2004 Mentor Graphics Technical Library
New Concepts in OPC	Nick Cobb and Yuri Granik Mentor Graphics	Apr 01, 2004 Mentor Graphics Technical Library
Part 1: Software Development for Transportation Systems	Colin Walls Mentor Graphics	Mar 31, 2004 2004 Embedded Systems Conference
Part 2: Software Development for Transportation Systems	Colin Walls Mentor Graphics	Mar 31, 2004 2004 Embedded Systems Conference
Virtex Variable-Input LUT Architecture	Ralf Krueger and Brent Przybus Xilinx	Mar 12, 2004 Mentor Graphics Technical Library
How to Get the Most out of an Autorouter	Sherwin Davenport Mentor Graphics	Mar 12, 2004 Mentor Graphics Technical Library
Latency versus Packet Buffering for Ethernet	Scott Barrick Mentor Graphics	Mar 12, 2004 Mentor Graphics Technical Library
PCB Designers Need Fabrication Analysis	Yan Killy Mentor Graphics	Mar 12, 2004 Mentor Graphics Technical Library
Determining Deterministic Jitter	Gene Garat, Eric Bogatin Mentor Graphics and Synergetix	Mar 12, 2004 Mentor Graphics Technical Library
Bluetooth Transceiver Design: A Top-Down Flow for Complex RF Mixed-Signal ICs	Avi Gupta and Marius Sida, Rami Ahola and Daniel Wallner Mentor Graphics and Spirea	Mar 12, 2004 Mentor Graphics Technical Library
Multiple Workstation Equivalence Checking Provides Capacity and Performance for Regression Testing of Multimillion Gate Designs	Kenneth Larsen Mentor Graphics	Mar 12, 2004 Mentor Graphics Technical Library
Using Physical Macros for FPGA Timing Closure	Dan DeVries Mentor Graphics	Feb 2004 Mentor Graphics Technical Library
Using the Mentor Graphics Precision RTL Synthesis Tool for Advanced Stratix II Designs	Jan Sian Tai, Rakesh Jain Altera and Mentor Graphics	Feb 2004 Mentor Graphics Technical Library
10G Serial Backplane Technology Has Arrived	Tim Hemken Xilinx	Jan 05, 2004 Mentor Graphics Technical Library
Optimizing the Design and Verification of Embedded Systems	Jim Kenney Mentor Graphics	Jan 2004 Mentor Graphics Technical Library
Adjusting Signal Timing: Part 2—Crosstalk Effects in Serpentine Traces	Douglas G. Brooks UltraCAD Design	Jan 2004 Mentor Graphics Technical Library
Methodology Shift: Adopting a Design for Manufacture Flow	John Ferguson Mentor Graphics	Jan 2004 Mentor Graphics Technical Library
When Free is Very Expensive	Jeff Wilson Mentor Graphics	Dec 2003 Mentor Graphics Technical Library
Smart Move: A Placement-Aware Retiming and Replication Method for Field Programmable Gate Arrays	Peter Suaris, Dongsheng Wang, and Nan-Chi Chou Mentor Graphics	Dec 2003 Mentor Graphics Technical Library
Creative Uses for Spartan-3 Dedicated Resources	Marc Baker Xilinx	Nov 2003 Mentor Graphics Technical Library
Crosstalk, Part 1—Understanding Forward vs. Backward	Douglas Brooks UltraCAD Design	Nov 2003 Mentor Graphics Technical Library
How to Preserve Timing Gains in Incremental Design	Mike Fingeroff Mentor Graphics	Oct 2003 Mentor Graphics Technical Library
Programmable Logic Migration Platforms for Military Applications	Darren Zacher, Ken O'Neill Mentor Graphics and Actel	Oct 2003 Mentor Graphics Technical Library
Leveraging RTL and Physical Synthesis Integration to Achieve Timing Closure in FPGAs	Daniel C. Hoggar Mentor Graphics	Oct 2003 Mentor Graphics Technical Library
Adjusting Signal Timing: Part 1	Douglas Brooks UltraCAD Design	Oct 2003 Mentor Graphics Technical Library
Solving the Challenges of Testing Small Embedded Cores and Memories Using FastScan MacroTest	Mentor Graphics	Sep 2003 Mentor Graphics Technical Library
FPGA Synthesis: The Vendor-Independent Approach	Anil Khanna Mentor Graphics	Sep 2003 Mentor Graphics Technical Library
Altera HardCopy Stratix Devices Offer an Alternative to ASICs	Rakesh Jain Mentor Graphics	Jul 2003 Mentor Graphics Technical Library
Bring in the Pros: When to Consider a Commercial RTOS	Colin Walls Mentor Graphics	Jul 2003 Mentor Graphics Technical Library
Embedded Considerations for USB On-The-Go	Mark Saunders Mentor Graphics	Apr 26, 2003 2003 Embedded Systems Conference
Are the Benefits of Using FPGAs Consumed by the Obstacles of Integrating the FPGAs on a Printed Circuit Board?	Dave Brady and Tom Dewey Mentor Graphics	Apr 2003 Mentor Graphics Technical Library
Reducing FPGA Costs by Saving a Speed Grade	Jeff Wilson Mentor Graphics	Apr 2003 Mentor Graphics Technical Library
Re-Timing for Performance Improvement in FPGA Designs	Douang Phanthavong Mentor Graphics	Apr 2003 Mentor Graphics Technical Library
Advanced Routing Techniques: The Importance of Timing	Matthew Hogan Mentor Graphics	Apr 2003 Mentor Graphics Technical Library
Achieving Timing Closure with FPGA Physical Synthesis	Jeff Wilson and Tom Feist Mentor Graphics	Mar 2003 Mentor Graphics Technical Library
Advanced Synthesis Techniques for Radiation Hardened Antifuse Programmable Logic Design	Darren Zacher Mentor Graphics	Mar 2003 Mentor Graphics Technical Library
Flexible Design Solutions for SOHO Wireless LAN	Amit Dhir and David Vornholt Xilinx	Mar 2003 Mentor Graphics Technical Library
Design Documentation with HDL Designer	Tom Dewey Mentor Graphics	Feb 2003 Mentor Graphics Technical Library
Using Interface-Based Design For FPGA Design Construction	Sam Zhong Zhang Mentor Graphics	Feb 2003 Mentor Graphics Technical Library
Implementing DSP Designs in Altera Stratix Devices	Rakesh Jain Mentor Graphics	Feb 2003 Mentor Graphics Technical Library
Designing Digital Signal Processing with FPGAs	Allen Kinast Mentor Graphics	Feb 2003 Mentor Graphics Technical Library
FPGAs: Fast Track to DSP	Mentor Graphics	Jan 2003 Mentor Graphics Technical Library
Precision RTL Synthesis Supports Clock Propagation Across PLLs	Anil Khanna Mentor Graphics	Jan 2003 Mentor Graphics Technical Library
Version Management for Team Design in FPGA Advantage	Robert Jeffery and Sam Zhong Zhang Mentor Graphics	Jan 2003 Mentor Graphics Technical Library
Integration of Embedded Components within PCB Structures	Dean Wiltshire Mentor Graphics	2003 Mentor Graphics Technical Library
Mentor Graphics FPGA Methodology and Tool Overview	Kevin Morris Mentor Graphics	2003 Mentor Graphics Technical Library
Achieving Design Closure with Constraint-Driven Synthesis	Michael Fingeroff Mentor Graphics	Dec 2002 Mentor Graphics Technical Library
Seizing Control of the Design Process	Mentor Graphics	Nov 2002 Mentor Graphics Technical Library
IP Reuse for FPGA Design	Tom Dewey Mentor Graphics	Oct 2002 Mentor Graphics Technical Library
Precision Synthesis: The Next Generation Synthesis Platform	Mentor Graphics	Jun 2002 Mentor Graphics Technical Library
High-Speed Design: The Benefits of Analysis-Driven Routing	Mentor Graphics	May 2002 Mentor Graphics Technical Library
Creating Safe State Machines	Sam Zhong Zhang Mentor Graphics	2002 Mentor Graphics Technical Library
Sharing Your HDL Design Through a Web Browser	Peter Mulley Saros Technology	2002 Mentor Graphics Technical Library
Real Time Operating Systems for FPGA	Colin Walls Mentor Graphics	2002 Mentor Graphics Technical Library
Unbalanced Tracks and Differential Impedance	Polar Instruments	Nov 2001 Mentor Graphics Technical Library
Circuit Timing Analysis	Matthew Hogan Mentor Graphics	Sep 2001 Mentor Graphics Technical Library
Data Management for Electronic System Design Environment	John Siegl and Karl-Heinz Wirth Mentor Graphics	Aug 2001 Mentor Graphics Technical Library
Web-Based Part Development	Jack Woida and Ken Moffat Mentor Graphics	Aug 2001 Mentor Graphics Technical Library
System Solutions—Redefining Systems Design for the Electronics Community	Clive Maxfield Mentor Graphics	Sep 2000 Mentor Graphics Technical Library
Printed Circuit Board Routing at the Threshold	Dave Wiens Mentor Graphics	May 2000 Mentor Graphics Technical Library
ESR and Bypass Capacitor Self Resonant Behavior	Douglas G. Brooks UltraCAD Design	Feb 21, 2000 Mentor Graphics Technical Library
Hardware/Software Co-Simulation Strategies for the Future	Brian Bailey, Russ Klein, and Serge Leef Mentor Graphics	Mentor Graphics Technical Library
HW/SW Co-Verficiation Experience	Russ Klein and Ross Nelson Mentor Graphics	Mentor Graphics Technical Library
Methodology for Virtual HW/SW Integration	Serge Leef Mentor Graphics	Mentor Graphics Technical Library
HW/SW Co-Verification Technology	Russ Klein Mentor Graphics	Mentor Graphics Technical Library
Taking Co-Verification to the Limit	Russ Klein, Mentor Graphics Jon Connell and Allan Skillman, ARM David Streams, Microsoft ARM, Mentor Graphics, and Microsoft	Mentor Graphics Technical Library
Interconnect Simple: Accurate and Statistical Models Using On-Chip Measurements for Calibration	James C. Chen,Roberto Suaya BTA Technology and Mentor Graphics	Mentor Graphics Technical Library
Phase Aware Proximity Correction for Advanced Masks	Olivier Toublan, Emile Sahouria, Nick Cobb, Thuy Do, Tom Donnelly, Yuri Granik, and Frank Schellenberg, Mentor Graphics Patrick Schiavone, CNET CNET and Mentor Graphics	Mentor Graphics Technical Library
Hardware/Software Co-Verification of CDMA ASIC Designs	Siddartha Ray Chaudhuri, Qualcomm Russell Klein, Mentor Graphics Qualcomm and Mentor Graphics	Mentor Graphics Technical Library
IEEE Std VHDL 1076.1-1999: The Analog and Mixed-Signal Extensions for VHDL		Mentor Graphics Technical Library
Achieving Greater Capacity for Physical Verification without Losing Performance	John Ferguson Mentor Graphics	Mentor Graphics Technical Library
Executing an RTOS on Simulated Hardware using Co-verification	David Harris and DeVerl Stokes, ussell Klein In-System Design and Mentor Graphics	Mentor Graphics Technical Library
Board Systems Design and Verification—Redefining Systems Design for the Electronics Community	Mentor Graphics	Mentor Graphics Technical Library
Making Heads or Tails Out of Choosing Your Next Compiler and Debugger	Mentor Graphics	Mentor Graphics Technical Library
The Future of Embedded Software Debugging	Mentor Graphics	Mentor Graphics Technical Library
Optimization Techniques for RISC Microprocessors	Mentor Graphics	Mentor Graphics Technical Library
Adopting Programming Conventions	Jean Labrosse Microtec	Mentor Graphics Technical Library
Using C++ Efficiently in Embedded Applications	Cesar A. Quiroz Mentor Graphics	Mentor Graphics Technical Library
C or C++ Programming Techniques	Robert Monkman Mentor Graphics	Mentor Graphics Technical Library
Meeting the Requirements for Certified Software	Embedded Software Division Mentor Graphics	Mentor Graphics Technical Library
DSM LVS Automatic Test Vehicles	Dave La Rosa Delphi Delco Electronic Systems	Mentor Graphics Technical Library
DSM Cambio: Interactive Compaction of Mixed Signal Layout with the IC Station	Manfred Henning and Juergen Scheible, Kurt Liebermann and Thomas Dilling RRobert Bosch GmbH, University of Dortmund, Germany	Mentor Graphics Technical Library
DSM Using Calibre in a Design for Manufacturability Environment	Jacob Bakker Philips Electronics	Mentor Graphics Technical Library
The Physical Verification Challenge—Mentor Graphics and Sun Microsystems Partnership Success Story	John Ferguson, Ward Vercruysse Sun Microsystems and Mentor Graphics	Mentor Graphics Technical Library
Seamless-izing Memories for Seamless Co-Verification	Mike Andrews Mentor Graphics	Mentor Graphics Technical Library
When Memory Address Bits are Out of Order	Mike Bradley Mentor Graphics	Mentor Graphics Technical Library
A Streamlined Approach for Debugging LVS Errors	John Ferguson Mentor Graphics	Mentor Graphics Technical Library
Partnering For Effective Ruledeck Creation	Mike Fliesler Advanced Micro Devices	Mentor Graphics Technical Library
Design Data Management For Multi-Site, Multi-EDA Tool Organizations	CIMdata	Mentor Graphics Technical Library
SoC Verification Based on IP Reuse Methodologies	Delaye Thomas Mentor Graphics	Mentor Graphics Technical Library
An Approach to Rapid Implementation of Multiple Emerging Broadband Communications Standards	Scott Powell Mentor Graphics	Mentor Graphics Technical Library
IP Reuse Creation for System-on-a-Chip Design	Pierre J. Bricaud Mentor Graphics	Mentor Graphics Technical Library
When Does It Make Sense to Design for Reuse?	Mark Peryer Mentor Graphics	Mentor Graphics Technical Library
Intellectual Property Business Models—Who Will Be the Microsoft of the EDA Industry	Dan Caldwell Mentor Graphics	Mentor Graphics Technical Library
Eliminating the Problems of Dual Physical Verification Flows	James Paris Mentor Graphics	Mentor Graphics Technical Library
Performance Estimation of MPEG4 Algorithms on ARM Architectures	Russell Klein and Mike Lyons, Kerry Travilla Packet Video and Mentor Graphics	Mentor Graphics Technical Library
Optimizing Test Coverage—Recommended Design Rules for an X-ray	Agilent Technologies	Mentor Graphics Technical Library
Advanced Methods for SoC Concurrent Engineering	Christophe Chevallaz, Nicolas Mareau, and Frank Ghenassia, Alain Gonier STMicroelectronics and Mentor Graphics	Mentor Graphics Technical Library
System Issues in Boundary-Scan Board Test	Agilent Technologies	Mentor Graphics Technical Library
Design for Testability—Test for Designability	Agilent Technologies	Mentor Graphics Technical Library
Creating A Hardware C Model That Connects to the Seamless C-Bridge API	Mike Andrews Mentor Graphics	Mentor Graphics Technical Library
ODA Table Symbol Reference Guide	Optimum Design Associates	Mentor Graphics Technical Library
Contrast-Based Assist Feature Optimization	J. A. Torres, Y. Granik, L. Capodieci, P. de Dood, D. J. Albers Prolific, AMD, and Mentor Graphics	Mentor Graphics Technical Library
Differential Trace Design Rules: Truth vs Fiction	Douglas G. Brooks UltraCAD Design	Mentor Graphics Technical Library
Co-Verification: From Tool to Methodology	Brian Bailey Mentor Graphics	Mentor Graphics Technical Library
Overcoming Physical Verification Challenges In a 100-million Transistor SoC Design	Charlie Jenkins, John Ferguson, Ph.D Fast-Chip and Mentor Graphics	Mentor Graphics Technical Library
Obtaining, Building, and Using DDD and gdb to Debug C-Bridge Models	Mike Andrews Mentor Graphics	Mentor Graphics Technical Library
HDI's Beneficial Influence on High-Frequency Signal Integrity: Part 2	Happy Holden Westwood Associates	Mentor Graphics Technical Library
HDI's Beneficial Influence on High-Frequency Signal Integrity: Part 1	Happy Holden Westwood Associates	Mentor Graphics Technical Library
Transmission Line Terminations It's The End That Counts!	Douglas G. Brooks UltraCAD Design	Mentor Graphics Technical Library
The Role of C-Based Languages in SoC Flows	Duaine Pryor, Ph.D. Mentor Graphics	Mentor Graphics Technical Library
Case Study 1: Mixed-Signal Focus	Scott Cooper, Peter Ashenden, Greg Peterson, Darrell Teegarden Elsevier Science and Mentor Graphics	Mentor Graphics Technical Library
Case Study 2: Mixed-Technology Focus	Scott Cooper, Peter Ashenden, Greg Peterson, Darrell Teegarden Elsevier Science and Mentor Graphics	Mentor Graphics Technical Library
Case Study 3: DC-DC Power Converter	Tom Egel, Peter Ashenden, Greg Peterson, Darrell Teegarden Elsevier Science and Mentor Graphics	Mentor Graphics Technical Library
Case Study 4: Communications System	Tom Egel,Peter Ashenden, Greg Peterson, Darrell Teegarden Elsevier Science and Mentor Graphics	Mentor Graphics Technical Library
Case Study 5: RC Airplane System	Scott Cooper, Peter Ashenden, Greg Peterson, Darrell Teegarden Elsevier Science and Mentor Graphics	Mentor Graphics Technical Library
Universal Process Modeling with VTRE for OPC	Yuri Granik, Nick Cobb and Thuy Do Mentor Graphics	Mentor Graphics Technical Library
Design Verification Flow for Model Assisted Double Dipole Decomposition	J.A. Torres, F. Schellenberg and O. Toublan Mentor Graphics	Mentor Graphics Technical Library
Model Based OPC Considering Process Window Aspects—A Study	Steffen Schulze, Pat LaCour, Emile Sahouria, Yuri Granik, and Nick Cobb, Oiseo Park, Rainer Zimmermann, Ming-Jui Chen Infineon Technologies, United Microelectronics, and Mentor Graphics	Mentor Graphics Technical Library
Hardware/Software Co-Verification with RTOS Application Code	Michael Bradley, Kainian Xie Hyperchip and Mentor Graphics	Mentor Graphics Technical Library
Streamlining the SoC Design Flow	Claudia Relyea Mentor Graphics	Mentor Graphics Technical Library
Mentor Graphics Analog/Mixed-Signal IC Design Kits Save Time and Improve Design Accuracy	John Casey Mentor Graphics	Mentor Graphics Technical Library
Design Capture for Analog/Mixed-Signal SoCs—It's Not Just About Entering Schematics Anymore	John Casey Mentor Graphics	Mentor Graphics Technical Library
Synthesizing FPGAs with Verilog 2001	Mentor Graphics	Mentor Graphics Technical Library
Xilinx LogiCORE PCI Core Flow	Mike Fingeroff Mentor Graphics	Mentor Graphics Technical Library
Microstrip Propagation Times: Slower Than We Think	Ultracad Design	Mentor Graphics Technical Library
A GDS-based Mask Data Preparation Flow—Data Volume Containment by Hierarchical Data Processing	Steffen Schulze and Pat Lacour, Peter Buck DuPont Photomasks and Mentor Graphics	Mentor Graphics Technical Library
Alternatives to Alternating Phase Shift Masks for 65nm	J. Andres Torres and Wilhelm Maurer Mentor Graphics	Mentor Graphics Technical Library
Design Integrity Issues Affecting Mixed-Signal Designs	Claudia Relyea Mentor Graphics	Mentor Graphics Technical Library
The Glue in a Confident SoC Flow	John Ferguson Mentor Graphics	Mentor Graphics Technical Library
Creating a Console within Seamless	Michael Bradley Mentor Graphics	Mentor Graphics Technical Library
Embedded Deterministic Test—DFT Technology for High-Quality Low-Cost IC Manufacturing Test	Mentor Graphics	Mentor Graphics Technical Library
How to Get Started in HDI with Microvias	Happy Holden Westwood Associates	Mentor Graphics Technical Library
LVS—Parasitic Extraction Link: Why Stronger is Better	John Ferguson Mentor Graphics	Mentor Graphics Technical Library
Measuring Physical Parameters: Make Assumptions, Make Mistakes	Brian Marshall Mentor Graphics	Mentor Graphics Technical Library
The Fundamentals of VHDL-AMS for Automotive Electrical Systems Modeling	Mentor Graphics	Mentor Graphics Technical Library
3.125 Gbps with your Hair on Fire—Simulation-Based Signal-Integrity Analysis of Digital Interconnects at Multi-Gigabit Speeds	Bill Hargin Mentor Graphics	Mentor Graphics Technical Library
Scripting with DxDesigner	Sherwin Davenport Mentor Graphics	Mentor Graphics Technical Library
Optimization of the Data Preparation for Variable Shaped Beam Mask Writing Machines	Steffen Schulze and Pat Lacour Mentor Graphics	Mentor Graphics Technical Library
Statistical Data Assessment for Optimization of the Data Preparation and Manufacturing	Steffen Schulze and Pat Lacour Mentor Graphics	Mentor Graphics Technical Library
Model-Assisted Placement of Sub-resolution Assist Features Experimental Results	J.A. Torres, Travis Brist Mentor Graphics and LSI Logic	Mentor Graphics Technical Library
New Process Models for OPC at sub-90nm Nodes	Yuri Granik and Nick Cobb Mentor Graphics	Mentor Graphics Technical Library
Plane Generation	Todd Hendren Mentor Graphics	Mentor Graphics Technical Library
New Stream Format: Progress Report on Containing Data Size Explosion	Pat LaCour, Steffen Schulze and Laurence Grodd, Al Reich, Kent Nakagawa Mentor Graphics, Motorola, DuPont Photomask	Mentor Graphics Technical Library
MDP In A Nutshell	Yuri Granik, Nick Cobb and Thuy Do Mentor Graphics	Mentor Graphics Technical Library
Scalable Verification: A Comprehensive Flexible Methodology for Complex Multimillion Gate Designs	Brian Bailey Mentor Graphics	Mentor Graphics Technical Library
Hardware/Software Co-Verification	Russel Klein Mentor Graphics	Mentor Graphics Technical Library
Staying Competitive: Advantages of Adopting a Single Tool for AMS SoC Parasitic Extraction	Carey Robertson Mentor Graphics	Mentor Graphics Technical Library
Transaction-Based Co-Modeling Changes SoC Verification Methodology	Luis Garcia and Russ Vreeland Broadcom	Mentor Graphics Technical Library
Integration of OPC and Mask Data Preparation	Pat LaCour, Steffen Schulze, Norma Rodriguez Mentor Graphics and Advanced Micro Devices	Mentor Graphics Technical Library
High Performance Fracturing for Variable Shaped Beam Mask Writing	Steffen Schulze, Emile Sahouria, Eugene Miloslavsky Mentor Graphics	Mentor Graphics Technical Library
Design Strategies for Future Lithographic Technologies (or, OPC Will Never Die)	F.M. Schellenberg Mentor Graphics	Mentor Graphics Technical Library
Power Amplifier Simulations with Eldo RF (ACPR)	Cyril Descleves Mentor Graphics	Mentor Graphics Technical Library
Addressing the Layout Challenges of Increasing Analog Content in SoCs	Ernie Koeroghlian and Eva Gupta Mentor Graphics	Mentor Graphics Technical Library
Introduction to ADMS RF (Digital AGC Loop)	Cyril Descleves Mentor Graphics	Mentor Graphics Technical Library
Motion Control System Design with Multi-language Simulation Tools	Mentor Graphics	Mentor Graphics Technical Library
Getting Closer to a Top-Down Methodology for RF SoC Design	Jean Oudinot Mentor Graphics	Mentor Graphics Technical Library
IP Multicasting	Dan Schiro Mentor Graphics	Mentor Graphics Technical Library
Using the CODE Technique to Print Complex Two-Dimensional Structures in a 90nm Ground Rule Process	S. Manakli and P.J. Goirand, Y. Trouiller, O. Toublan, P. Schiavone, Y. Rody STMicroelectronics, LETI-CEA, Mentor Graphics, CNRS-LTM, Philips Semiconductors	Mentor Graphics Technical Library
FPGA Design and the Nucleus RTOS	Kyle Craig Mentor Graphics	Mentor Graphics Technical Library
Nucleus USB—Support for the Universal Serial Bus	Lance Brooks Mentor Graphics	Mentor Graphics Technical Library
Confronting the Challenges of Nanometer Design	Joseph Sawicki Mentor Graphics	Mentor Graphics Technical Library
Dynamic Floorplanning: A Practical Method Using Relative Dependencies for Incremental Floorplanning	Mark Basel, Ramaprasad Kadiyala and Herve Menager Mentor Graphics and Philips Semiconductors	Mentor Graphics Technical Library
Beyond P-Cell and Gate-Level Assumptions: Accuracy Requirements for Simulation of Nanometer Designs	Brian Marshall Mentor Graphics	Mentor Graphics Technical Library
Challenges of Silicon Modeling in Nanometer Designs	Carey Robertson Mentor Graphics	Mentor Graphics Technical Library
Using Programmable Logic for Embedded Systems	Lara Simsie Altera	Mentor Graphics Technical Library
Making the Impractical Practical: Verification of Large FPGA-centric Systems Using Hardware/Software Co-Verification	Ross Nelson and Gary Dare Mentor Graphics	Mentor Graphics Technical Library
Utilizing SystemC for Design and Verification	Alan Ma Mentor Graphics	Mentor Graphics Technical Library
Bluetooth Transceiver Design with VHDL-AMS	Rami Ahola and Daniel Wallner, Marius Sidan Spirea and Mentor Graphics	Mentor Graphics Technical Library


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