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Title |
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Author/Company |
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Published |
| |
Implementing a Low-Power Reference Flow for an Advanced Microprocessor
|
|
Anand Iyer and Susan Runowicz-Smith
Cadence
|
|
Apr 2008
ARM IQ Article |
| |
Comprehensive Verification of ARM Processor-Based SoC Designs
|
|
Amjad Qureshi and John Brennan
Cadence
|
|
Nov 2007
ARM IQ Article |
| |
Chip Design Using 45nm Processes Requires a Holistic Approach to Planning and Implementation
|
|
Erica Brand
Cadence
|
|
Sep 2007
White Paper |
| |
Model-Based Methods Critical for Effective Manufacturing-Aware Physical Design
|
|
Bob Naber and Nitin Deo
Cadence
|
|
Sep 2007
White Paper |
| |
Next-Generation Signoff Analysis Tackles Electrical, Physical, and Manufacturing Challenges
|
|
Chin-Chi Teng and Rahul Deokar
Cadence Design Systems
|
|
Aug 2007
White Paper |
| |
Encounter Express: Simplifying ARM Cortex-A8 Implementation
|
|
Graham Scott
Cadence Industry Alliances
|
|
Apr 2007
ARM IQ Article |
| |
Architecting, Designing, Implementing, and Verifying Low-Power Digital Integrated Circuits
|
|
Cadence Design Systems
|
|
Jan 2007
White Paper |
| |
Reducing Block, Chip, and System Design Risk with a "Plan-to-Closure" Verification Approach
|
|
Cadence Design Systems
|
|
Oct 2006
White Paper |
| |
Silicon Design Chain Extends Low-Power Design Collaboration
|
|
George Kuo
Cadence
|
|
Sep 2006
ARM IQ Article |
| |
Speeding Design of Custom Silicon: The Virtuoso Custom Platform
|
|
Cadence Design Systems
|
|
Sep 2006
White Paper |
| |
Silicon Design Chain Extends Low-Power Design Collaboration
|
|
George Kuo
Cadence
|
|
Jun 2006
ARM IQ Article |
| |
It Takes an Industry: A Low-Power Design-through-manufacturing Flow
|
|
George Kuo
Cadence Design Systems
|
|
Jul 2005
ARM IQ Article |
| |
Motivations and Methodology for Nanometer Library Characterization
|
|
Cadence Design Systems
|
|
May 2005
Technology Paper |
| |
Accelerating ARM Core-based Wireless Application Development
|
|
Ran Avinun
Cadence Design Systems
|
|
Mar 14, 2005
ARM IQ Article |
| |
Parallel Software Development with Simulation Tools for MXC Architectures
|
|
Filip C. Thoen, Gerardo A. Dada
Virtio Corporation, Freescale Semiconductor
|
|
Aug 28, 2004
ARM IQ Article |
| |
Complex SoC Verification Designed for Reuse
|
|
Andy Nightingale, John Pierce
ARM and Cadence Design Systems
|
|
Aug 28, 2004
ARM IQ Article |
| |
Ensuring Rapid, Predictable Implementation of ARM Cores
|
|
Steve Carlson
Cadence Design Systems
|
|
May 25, 2004
ARM IQ Article |
| |
OpenAccess Enables Fast Multimillion-Gate SoC Layout Tool
|
|
Arnold Ginetti
Cadence Design Systems
|
|
Apr 06, 2004
OpenAccess Conference Paper |
| |
Silicon Design Chain Cooperation Enables Nanometer Chip Design
|
|
Cadence and TSMC
|
|
Dec 2003
Product Paper |
| |
Overview of OpenAccess: The Next-Generation Database for IC Design
|
|
Joseph T. Santos
Cadence Design Systems
|
|
Apr 2003
OpenAccess Forum Paper |
| |
Adopting OpenAccess Technology
|
|
Ted Paone
Cadence Design Systems
|
|
Apr 2003
OpenAccess Forum Paper |
| |
It's About Time: Requirements for the Functional Verification of Nanometer-Scale ICs
|
|
Lavi Lev, Rahul Razdan, and Christopher Tice Design Systems
Cadence Design Systems
|
|
Jan 2003
Technology Paper |
| |
Physical Prototyping—The Key to Nanometer SoC Chip Design
|
|
Cadence Design Systems
|
|
Sep 2002
Technology Paper |
| |
Down to the Wire—Requirements for Nanometer Design
|
|
Lavi Lev and Ping Chao
Cadence Design Systems
|
|
Aug 2002
Technology Paper |
| |
The Rise of Digital/Mixed-Signal Semiconductors and Systems-on-a-Chip
|
|
Cadence Design Systems
|
|
Jun 2002
Technology Paper |
| |
Substrate Coupling Analysis for RF Circuits
|
|
Cadence Design Systems
|
|
Oct 2001
Technology Paper |
| |
An Introduction to System Level Modeling in SystemC 2.0
|
|
Stuart Swan
Cadence Design Systems
|
|
May 2001
Technology Paper |
| |
Signal Integrity Issues When Embedding Analog Blocks
|
|
Raminderpal Singh
Cadence Design Systems
|
|
Sep 2000
2000 OSEE Paper |
