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Title	Author/Company	Published
A USB Case Study: Accelerating Software Driver Development using Virtual Platforms	Frank Schirrmeister Synopsys	Aug 2008 White Paper
Using Virtual Platforms for Pre-Silicon Software Development	Frank Schirrmeister et al. Synopsys	May 2008 White Paper
Solving the Integration Challenges for USB-Enabled Designs	Gervais Fong and Eric Huang Synopsys	Oct 2007 White Paper
Managing Functional Verification Projects: Meeting the Challenges of High-Level Verification in Today's SoCs	Kwamina Ewusie and Rajat Mohan Synopsys	Oct 2007 White Paper
Life Begins at 65—Unless You Are Mixed Signal?	Navraj S. Nandra et al. Synopsys, NOKIA, Accent, Atmel, and Infineon	Sep 2007 White Paper
DDR SDRAM: A Low Cost, Yet Increasingly Complex Off-Chip Memory Solution for SoCs	Graham Allan Synopsys	Aug 2007 White Paper
Implementing Physical Layer Connectivity IP in Deep Sub-Micron Technologies	Navraj S. Nandra Synopsys	May 2007 White Paper
Implementing an End-to-End Low-Power Multi-Voltage Methodology	Synopsys	Apr 2007 White Paper
Continuous Integration of Hardware and Software	Shay Benchorin Synopsys	Apr 05, 2007 2007 Embedded Systems Conference
Setting up a Versatile Flow and Environment to Improve Design Productivity	Andrew Potemski and Ravi Srinivasan Synopsys	Nov 2006 White Paper
Enabling Rapid Adoption of the AMBA 3 AXI Protocol-based Design	Mick Posner Synopsys	Sep 2006 ARM IQ Article
Streamlining SoC Design from ESL to GDSII	Phil Morris Synopsys	Sep 2006 ARM IQ Article
Beyond DDR2 400: Physical Implementation Challenges in Your SoC Design	David Wallace Synopsys	Aug 2006 White Paper
Delivering High-Performance Implementations of ARM Processors with IC Compiler in the ARM-Synopsys Reference Methodology	Marc Swinnen Synopsys	Jun 2006 ARM IQ Article
SystemVerilog for e Experts—Understanding the Migration Process	Janick Bergeron Synopsys	May 01, 2006 White Paper
Integrating a PCI Express Digital IP Core into a Gigabit Ethernet Controller	Fadi Saibi and Jing-fan Zhang Agere Systems and Synopsys	Apr 2006 White Paper
SystemC and SystemVerilog for Electronic System-Level (ESL) Design	Rindert Schutten et al Synopsys	Apr 07, 2006 2006 Embedded Systems Conference Paper
Five Vital Steps to a Robust Testbench with DesignWare Verification IP and Verification Methodology Manual (VMM) for SystemVerilog	Charles Li and Ashesh Doshi Synopsys	Mar 01, 2006 White Paper
Advanced Techniques for Building Robust Testbenches with DesignWare Verification IP and Verification Methodology Manual (VMM) for SystemVerilog	Charles Li and Ashesh Doshi Synopsys	Mar 01, 2006 White Paper
Low Power USB 2.0 PHY IP for High-Volume Consumer Applications	Gervais Fong Synopsys	Feb 06, 2006 Product Paper
A Blueprint for SoC Verification Success with SystemVerilog	Tom Borgstrom, Alan Hunter Synopsys and ARM	Feb 2006 ARM IQ Article
DFM in Action - FPGA Chip performance Improvement with Gate Shrink through Alternating PSM 90nm process	Synopsys	Dec 2005 Technology Paper
Automated Low-Power Implementation Methodology	Phil Morris, Phil Watson Synopsys and ARM	Oct 2005 ARM IQ Article
Coding Guidelines for Datapath Synthesis	Reto Zimmermann Synopsys	Jul 2005 Product Paper
Five Vital Steps to a Robust Testbench with DesignWare Verification IP and Reference Verification Methodology (RVM)	Charles Li and Ashesh Doshi Synopsys	Jul 2005 Product Paper
Embedded Device Development Requires Concurrent Hardware and Software Optimization	Rindert Schutten and Thomas Anderson Synopsys	Jul 2005 Embedded Computing Design Article
Designing Using the AMBA 3 AXI Protocol	Mick Posner and Darrin Mossor Synopsys	Apr 2005 Technology Paper
Taking The "Hard" Out of Hardware Design by Using A Matlab-based Design Flow	Eric Cigan, AccelChip Aaik van der Poel AccelChip and Synopsys	Mar 10, 2005 2005 Embedded Systems Conference
Reducing AMBA™ Methodology-based SoC Design Time by More than 50 Percent	John Swanson Synopsys	Nov 28, 2004 ARM IQ Article
Modeling Total Cost of Ownership for Semiconductor IP	John Weekley Synopsys	Nov 2004 Technology Paper
Design Practices and Strategies for Efficient Signal Integrity Closure	Richard Nouri, Todd Beck, and Jennifer Pyon Synopsys	Oct 2004 Technology Paper
Hard Macro Placement in Complex SoC Design	Neeraj Kaul and Steve Kister Synopsys	Sep 2004 Product Paper
Verification = IP = Verification = IP =...Part 2: Design Quality and Productivity	Aart de Geus Synopsys	Jun 2004 Technology Paper
Lowering the Barriers to Core-Based SoC Design	Markus Levy Convergence Promotions	May 25, 2004 ARM IQ Article
Power Management in Complex SoC Design	Jim Flynn and Brandon Waldo Synopsys	Apr 2004 Technology Paper
Verification = IP = Verification = IP...Part 1: Current Industry Situation and Drivers	Aart de Geus Synopsys	Mar 2004 Technology Paper
Discovery AMS Full-Chip Verification of Mixed-Signal Designs	Synopsys	Feb 2004 Verification Avenue Article
A Reference Verification Methodology for Vera	Synopsys	Feb 2004 Verification Avenue Article
Integration of Vera and System Studio	Rindert Schutten Synopsys	Feb 2004 Verification Avenue Article
How to Get Started with SystemVerilog Assertions	Bruce S. Greene Synopsys	Feb 2004 Verification Avenue Article
Building a USB 2.0 Device AMBA Subsystem with DesignWare IP	John A. Swanson Synopsys	Feb 2004 Technology Paper
Hierarchical Design Techniques	Vijay Gullapalli and Kaijian Shi Synopsys	Jan 2004 Technology Paper
Attacking the Verification Challenges: Applying Next Generation Verification IP to Bus Protocol-based Designs	Richard Pugh, Neill Mullinger, and Jay Hopkins Synopsys	Oct 2003 Technology Paper
Early Hardware/Software Integration Using SystemC 2.0	Jon Connell and Bruce Johnson ARM and Synopsys	Mar 16, 2002 2002 Embedded Systems Conference
Achieving DFT Closure—The Next Step in Design For Test	Synopsys	2001 Technology Paper
System-Level Design in the SoC Era	Brian Barrera, Johannes Stahl, and Yankin Tanurhan Synopsys	Nov 04, 1999 ICSPAT Paper


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