Régis Santonja
Freescale Semiconductor

As the complexity and modularity of modern mixed-signal ICs increase, together with the costs of masks and wafers, one needs to find new ways to verify the IC before tape-out. This paper demonstrates how at Freescale we take up this challenge. It will present most aspects of our flow, starting with testbench architecture, database management, functional coverage, then with mixed-level and full transistor simulations, floating nodes, power consumption and regression tests.