CMP - United Business Media TechOnline
All Articles Products Courses Papers VirtuaLabs Webinars Web



 
LoginRegister
      TechOnline > Electronics Company Directory > Technical Paper
Technical Papers
Using OCP and Coherence Extensions to Support System—Level Cache Coherence

Click to Download
pdf logo
Technical Paper
1198 KB (10 pages)
April 2009
 

Chien-Chun Chou et al
Sonics et al

Open Core Protocol (OCP) is a common standard for Intellectual Property (IP)core interfaces. OCP facilitates IP core plug-and-play and simplifies reuse by decoupling the cores from the on-chip interconnection network and from one another. Enabling hardware cache coherence support at OCP cores requires the OCP interface to generate and receive additional coherence messages in order to invalidate cache lines cached at the core side or transfer cache lines and their ownerships between OCP cores. In this article the concept of OCP coherence extensions is proposed. Moreover, a possible OCP-based coherence design utilizing the proposed OCP coherence extensions to support system-level cache coherence is also demonstrated.

 
Rate this paper
WORSE | BETTER
1 2 3 4 5

submit a paper
Follow Tech Papers

MIPS Technologies
Sonics
Toshiba America Electronic Components (TAEC)
   

WEBINAR
1. Optimizing Noise in the Sensor Signal Path (Part III)

WEBINAR
2. Problem Solving with MATLAB and MathWorks Parallel Computing Tools

WEBINAR
3. Controlling BLDCs with the Lowest Software Overhead

TECH PAPER
4. Design Trends for High-Speed, Low-Power Connectivity IP at the Physical Layer