Stefan Rusu et al
Intel

The next-generation enterprise Xeon server processor consists of eight dual-threaded 64b Nehalem cores and a shared L3 cache. The system interface includes two on-chip memory controllers and supports multiple system topologies. The processor block design has 2.3B transistors and is implemented in 45nm CMOS using metal-gate high-κ dielectric transistors and nine Cu interconnect layers. The thermal design power is 130W.