Altera

Data rate requirements of backhaul connections for wireless base transceiver stations (BTSs) continue to increase, while the cost of available Gigabit Ethernet connections decreases. As a result, IP/Ethernet backhauling has become a prime choice for new installments. However, for the hundreds of thousands of basestations deployed with time-division multiplexed (TDM) connections (E1/T1), carriers must pay much more for TDM lease lines, but can cut their costs by using circuit emulation service (CES) to transport the signals over a less expensive Ethernet network.

For any CES application, clock recovery at the far end of the link represents a major challenge, as the interworking function (IWF) blocks need to support differential and adaptive clock recovery. For more demanding applications, such as synchronization of wireless basestations, carriers can apply a hybrid timing generator (HTG). This paper discusses the protocol details of CES, issues around clock recovery, and the network, node, and device architectures of CES solutions. The paper will also cover the benefits of FPGA-based implementations.