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Delay Model for Deep Submicron Wave Pipelined System

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2000 Online Symposium for Electronics Engineers (OSEE)
36 KB (10 pages)
September 2000
 

Chen Lan and Tang Zhimin
Institute of Computing Technology

Wave pipelining, or maximal rate pipelining, is a circuit design technique that allows digital synchronous systems to be clocked at rates higher than can be achieved with conventional pipelining techniques. This paper introduces a method of developing wave pipelined systems with deep submicron processing technology.

 
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Online Symposium for Electronics Engineers (OSEE)
   

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