CMP - United Business Media TechOnline
All Articles Products Courses Papers VirtuaLabs Webinars Web



 
LoginRegister
      TechOnline > Electronics Company Directory > Technical Paper
Technical Papers
Multi-Threading for Efficient Set-Top Box SoC Architectures

Click to Download
pdf logo
White Paper
342 KB (16 pages)
May 01, 2007
 

MIPS Technologies

The increasing sophistication of digital devices for the home — including the latest generation of set-top boxes — constantly challenges SoC designers to develop more complex architectures. Multi-threading, with its ability to boost performance, while reducing both power consumption and die area, meets these challenges head on. Learn how the MIPS32 34K processors can be used in a variety of STB applications, significantly enhancing the efficiency of both hardware and software system architectures and accelerating time-to-market.

 
Rate this paper
WORSE | BETTER
1 2 3 4 5

submit a paper
Follow Tech Papers

MIPS Technologies
   

TECH PAPER
1. Use Rowley CrossWorks and the MAXQ3120 Evaluation Kit to Create a Light Meter Application

TECH PAPER
2. System ACE Configuration Solution for Xilinx FPGAs

TECH PAPER
3. Interface Products Design Guide

TECH PAPER
4. Maintaining Data/Clock Synchronization with Spread-Spectrum EMI Reduction