CMP - United Business Media TechOnline
All Articles Products Courses Papers VirtuaLabs Webinars Web



 
LoginRegister
      TechOnline > Electronics Company Directory > Technical Paper
Technical Papers
Real-time VT5 Model Coverage Calculations During OPC Simulations

Click to Download
pdf logo
Mentor Graphics Technical Library
March 22, 2007
 

Ioana Graur et al.
Mentor Graphics and IBM

For a robust OPC solution, it is important to isolate and characterize the detractors from high quality printability. Failure in correctly rendering the design intent in silicon can have multiple causes. Model inability in predicting lithographic and process implications is one of them. Process model accuracy is highly dependant on the quality of data used in the calibration phase of the model. Structures encountered during the OPC simulation that have not been included in the calibration patterns, or even structures somewhat similar to those used in calibration, are some times incorrectly predicted.

In this paper, a new method for studying VT5 model coverage during OPC simulations is investigated. Employing the method described can help in avoiding catastrophic misses in the correction phase and allows for a robust approach to MBOPC.

Note: By clicking on the above link, this paper will be emailed to your TechOnline log-in address by Mentor Graphics.

 
Rate this paper
WORSE | BETTER
1 2 3 4 5

submit a paper

IBM
Mentor Graphics
   

TECH PAPER
1. Nucleus SNMP

TECH PAPER
2. An Integrated Tool Flow Supporting FPGA Prototyping and Debug

TECH PAPER
3. Using Strong Types in Your SystemVerilog Design and Verification