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Introducing the Virtex-5 PCI Express Endpoint Block

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Xcell Journal Article
154 KB (3 pages)
October 2006
 

Doug Kern
Xilinx

The PCIe subsystem is a point-to-point interface that replaces and overcomes the limitations of bus-based PCI and PCI-X standards. PCIe Generation 1 (Gen1) offers 2.5 Gbps speed with low-voltage differential signaling (LVDS), embedded 8B/10B encoding, dual-simplex signaling, and message-based serial protocol. This article explains how PCI Express is quickly becoming the standard high-bandwidth interconnect.

Reprinted with permission from Xcell Journal / Fourth Quarter 2006. Article © Xcell Journal.

 
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