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Powering Next-Generation Embedded SoCs

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September 2006
 

Pete Del Vecchio
MIPS Technologies

Designers everywhere face ever-increasing constraints on system cost and power consumption, while at the same time being required to add more performance and functionality to their SoCs. This is a difficult trade-off to address successfully.

Most previous approaches to improving system performance have relied on increasing the clock speed of a processor. This usually results in increased power consumption, however. Additionally, the performance of external memory has not kept pace with processor technology, and this mismatch limits any significant gains in system performance. Consequently the higher-frequency approach is leading to diminishing returns.

 
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