Paul Gramann
IBM

As CISC programmers transition from legacy processors to RISC architectures such as the PowerPC, they may be faced with a steep learning curve. This paper presents an overview of the PowerPC programming model for engineers and programmers new to the PowerPC architecture. It covers topics such as the PowerPC storage model, register set, instruction formats, memory management, interrupt handling, debug facilities, and provides suggestions for maintaining code compatibility across different PowerPC implementations.

For the purposes of this paper, little delineation is made between a processor's architecture, which defines the hardware resources of a processor, and the programming model, which is the programmer's view of how those hardware resources can be used.