O. Toublan and Shumay Shang, Kyle Patterson, Y.Rody, Jerome Belledent, and Christophe Couderc, Corinne Miramond and Frank Sundermann
Mentor Graphics, Motorola, Philips Semiconductors, STMicroelectronics
In this paper, we present a new technique (Critical Failure ORC or CF-ORC) to check the robustness of the structures created by OPC through the process window. The full methodology is explained and tested on a full chip at the 90-nm node. Improvements compared to standard ORC/MRC techniques will be presented on complex geometries. Finally, examples of concrete failure predictions are given and compared to experimental results.
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