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OpenAccess Enables Fast Multimillion-Gate SoC Layout Tool

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OpenAccess Conference Paper
56 KB (4 pages)
April 6, 2004
 

Arnold Ginetti
Cadence Design Systems

Virtuoso Chip Editor (VCE) is one of Cadence's recently released products that fully leverage OpenAccess technology. It delivers increased capacity and performance, as well as improved interoperability for chip integration and finishing involving roundtrip data exchange with SOC Encounter and ASSURA. Its real-time, interactive editing can support 5 million component designs composed of blocks of up to 500K components. In this paper, we will describe how the OpenAccess technology was used to enable these capabilities and more.

 
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Cadence Design Systems
Silicon Integration Initiative (Si2)
   

COURSE
1. Co-Design Tools for Architecting Systems-On-A-Chip

COURSE
2. Communication Systems on a Chip