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	Title		Author/Company		Published
	HapsTrak — A Key to Success		Bo Nilsson Synplicity		Oct 2007 White Paper
	Efficient DSP Algorithm Development for FPGA and ASIC Technologies		Shiv Balakrishnan and Chris Eddington Synplicity		Jul 2007 White Paper
	Infusing Speed and Visibility into ASIC Verification		Mario Larouche Synplicity		Jan 2007 White Paper
	Using M and Simulink for DSP Control and Datapath Design		Chris Eddington Synplicity		Nov 2006 White Paper
	FPGA Design Verification: Techniques for Creating a Fully Functional Design		Dennis McCartybr Synplicity		May 01, 2006 Technical Paper
	Getting the Most Out of Spartan-3 FPGAs with Synplify Pro		Steve Pereira Synplicity		Apr 2006 Xcell Journal Article
	Tips for Using Synplify Pro to Improve Altera Device Performance		Gael Paul Synplicity		Apr 01, 2006 Product Paper
	Achieve Faster Timing Closure with Graph-Based Physical Synthesis		Jeff Garrison Synplicity		Dec 01, 2005 Xcell Journal Article
	Synthesis Tool Strategies		Steve Pereira Synplicity		Dec 01, 2005 Xcell Journal Article
	True DSP Synthesis: The Birth of a New Design Methodology		Chris Eddington Synplicity		Nov 01, 2005 Product Paper
	Unique Synthesis Technology Reduces ASIC Die Size		Angela Sutton Synplicity		Oct 2005 Product Paper
	Unique Graph-Based Physical Synthesis Technology: For Fast Timing Closure and Improved Performance of FPGA Designs		Chris Eddington Synplicity		Oct 2005 Product Paper
	True DSP Synthesis for Fast, Efficient, High-Performance FPGA Implementations		Synplicity		Jan 2005 Product Paper
	Efficient Development of Wireless IP with High Level Modeling and Synthesis		Chris Eddington Synplicity		White Paper


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