ESC SV-549- Hardware Acceleration of DSP Algorithms for Embedded Computing

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ESC SV-549- Hardware Acceleration of DSP Algorithms for Embedded Computing
Alan Coppola President, OptNgn Software and David Pellerin CTO, Impulse Accelerated Technologies, Inc.

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DESCRIPTION DSP application acceleration has arrived for FPGA-embedded systems. This class surveys the latest design methodologies, tools, and libraries needed for acceleration of streaming data applications. Modern embedded systems involve many types of signal processing applications. These hardware-accelerated transformations include Fast Fourier Transform (FFT) and other related algorithms in the domains of wireless, video, imaging, audio, and signal filtering. This class focuses on the use of FPGA libraries and C-to-hardware tools, as well as covering FPGA-embedded processors with hardware accelerators. PREREQUISITES Course Price $19.95 Working knowledge of embedded systems design including the use of the C language; FPGA experience is useful but not required ESTIMATED TIME 91 minutes AUTHOR

Alan Coppola President, OptNgn Software and David Pellerin CTO, Impulse Accelerated Technologies, Inc.

Dr. Alan Coppola is President of OptNgn Software, a startup company dedicated to supplying FPGA coprocessor acceleration libraries and design services in the embedded and HPC markets. Alan has worked on programmable logic design tools and architectures for Cypress Semiconductor, Mentor Graphics, and Intel where he successfully helped develop and launch a number of EDA platforms and products used by design engineers around the world, including the first VHDL programmable logic platform. He has worked extensively in creating language-based software systems for hardware design, using the latest large-scale optimization research knowledge for all aspects of that tool chain. He has advanced research-level knowledge of the mathematics, algorithms, electrical engineering and computer science needed to accelerate applications in many areas. Alan holds a PhD degree from SUNY at Binghamton, in mathematics, and has taught computer engineering, computer science, and mathematics courses at a number of universities. President and CTO David Pellerin is a key architect of advances in language-based design for PLDs and FPGAs, and has published four books on the subject of programmable logic and related technologies. Mr. Pellerin earlier founded Accolade Design Automation, where he was the architect of the PeakVHDL and PeakFPGA advanced products for HDL-based FPGA design. Accolade Design Automation was acquired by Altium Ltd. after which he directed Altium's FPGA Design Products. Mr. Pellerin also directed tools development for Quicksilver Technology, a provider of adaptive/reconfigurable computing devices.

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