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RISC Processor Architecture
Mike Maynard
Module
Lecture
 
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DESCRIPTION
This lecture gives a brief overview of the architecture of modern RISC processors, using the MIPS architecture as an example.

PREREQUISITES
None

 

INTENDED AUDIENCE
Anyone interested in learning about RISC processors. This lecture is particularly appropriate to both hardware and software engineers who are familiar with low and medium performance processors and who would like to know more about RISC for higher performance applications.

 

ESTIMATED TIME
25 min.

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