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Andes Introduces power-efficient CPU for high-performance Linux, Communications and Embedded Processing applications

Original Air Date: Jun 20, 2013 | Duration: 40 minutes Webinar
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Overview:
Andes Technology, one of EEtimes' Silicon 60 companies, will introduce their latest low-power, high performance CPU core, companion platform IPs, and Linux embedded system development solutions. This fully-synthesizable, power-efficient CPU core can achieve a speed of 1GHz using standard 40nm process technology and it is ideal for running high performance embedded SoC applications such as: embedded Linux devices, Communications & Data Plane engines, Advanced Driver Assistance Systems (ADAS) and others. Linux is popular for all kinds of embedded system since it offers great reliability and wide range of software packages. To help customers build embedded devices efficiently, Andes provides complete solution including user-friendly graphical IDE, rich software stack and debugging tools, and convenient evaluation platforms.

Estimated length: 40 minutes + 10 minutes Q&A

Who should attend:
Developers and managers who are interested in a power-efficient, high-performance CPU for embedded Linux systems or other SoC applications.

What attendees will learn:

  • Advanced features for high-performance microprocessors
  • Development environment and platform for embedded SoC development
  • Debugging tools and methodology for Linux applications
  • Complete Linux solution from Andes Technology and our company overview
Presenters:
Dr. Chuan-Hua Chang, Director, RD/Architecture, Andes Technology
Dr. Chang is the Director of the R&D/Architecture division of Andes Technology and is responsible for CPU architecture definition, design, and development. Dr. Chang has a long history in CPU and DSP architecture and development including several 64-bit microprocessor designs. He has been a key member of teams at:
  • Taiwan's Industrial Technology Research Institute (ITRI), SoC Technology Center
  • Intel's Massachusetts Microprocessor Design Center
  • DEC/Compaq's Alpha Processor Design Center

Dr. Chang received his Ph.D and M.S. from the EECS department of University of Michigan at Ann Arbor. He received his B.S. from National Tsing Hua University in Taiwan.

Dr. Kevin I-Cheng Chen, Senior Architect, Andes Technology
Dr. Chen is responsible for the system architecture definition of Andes processors. Prior to joining Andes, he has held a variety of management and engineering positions at Mstar Semiconductor and several Silicon Valley companies including nVidia Corp. and Advanced Micro Devices (AMD). He was also co-founder at two startups in both Silicon Valley and Taiwan. He has been involved in the design of more than 30 SoC Chips and holds multiple U.S. patents. Dr. Chen received his B.S. in Electrical Engineering from National Taiwan University, M.S. in Computer Engineering from Princeton University, and Ph.D. in Computer Engineering from University of Michigan.

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