Bringing Embedded MTP NVM IP to Advanced Process Nodes
The need for embedded multiple time programmable (MTP) non-volatile memory (NVM) IP in advanced process nodes is rapidly increasing as designers integrate more features and functionality into their system-on-chip (SoC) designs. SoC designers need to understand the available IP technology on 65- and 40-nm processes so they can choose optimized and reliable solutions for their applications. This webinar will focus on three main topics:
- Review the key applications and use models that drive the need for embedded MTP NVM IP in advanced process nodes
- Discuss the capabilities and limitations of technologies used to implement embedded MTP NVM IP in advanced process nodes
- Understand how Synopsys aligns the application and market needs to provide embedded MTP NVM IP at advanced nodes with optimized, targeted technology capabilities
Who should attend: SoC design engineers, managers and system architects
Craig Zajac, Senior Product Marketing Manager, Synopsys
Craig Zajac is the Senior Product Marketing Manager for the non-volatile memory IP, analog audio IP and video analog front-end IP product lines at Synopsys. Prior to joining Synopsys, Craig managed the non-volatile memory portfolio at Impinj and Virage Logic. Craig has over 15 years of experience in the semiconductor industry and has held product marketing and engineering roles at companies including National Semiconductor, ON Semiconductor, and Motorola. Craig holds a BS and MSEE from Stanford University and an MBA from Arizona State University.