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Building High-Performance SoCs with Configurable and Extensible Processors

Original Air Date: Apr 7, 2011 | Duration: 60 min Webinar
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Overview: 
With advanced SoC designs moving to smaller process geometries, designers are requiring high performance processor cores that are optimized for low-power consumption and small silicon area. This webinar will detail how the configurable, extensible DesignWare® ARC™ 32-bit processors offers a broad range of features that enable you to tailor the core for your specific embedded or host application. Learn how DesignWare ARC processors are ideal for today's heterogeneous multi-core SoCs and can help you build lower cost, high-performance SoCs, while minimizing power consumption and area.

Who should attend:
Designers who are developing SoCs for embedded applications that require 1 or more 32-bit processors.

Estimated Length: 50 minutes, 10 minutes Q&A

Presenter:
Mike Thompson, Sr. Manager of Product Marketing, DesignWare ARC Processors, Synopsys
Mike Thompson is the Sr. Manager of Product Marketing for the DesignWare ARC Processors at Synopsys where he is responsible for the microprocessor cores and subsystem solutions, and the development tools used with them. Mike has more than 30 years experience in both design and support of microprocessors, microcontrollers, IP, and the development of embedded applications and tools working previously for Virage Logic, Actel, MIPS, ZiLOG, Philips/Signetics, and AMD. Mike is also the primary author for Configurable Thoughts, a blog that discusses everything to do with microprocessors. He has a BSEE from Northern Illinois University and an MBA from Santa Clara University.

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