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1.4GHz Low Jitter PLL with Clock Distribution Solves Difficult Clocking Problems

Authored on: Jan 22, 2015 by Chris Pearson

Technical Paper / Product Paper

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Two of the more difficult challenges facing clock system designers are synchronizing multiple system clocks and creating low jitter data converter clocks. The LTC6950 overcomes these challenges by featuring Linear Technology's easy-to-use EZSync technology and providing five clock outputs with less than 100fs RMS additive jitter.

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