Using Virtual Platforms for BIOS Development and Validation
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Creating a simulation environment for the purpose of BIOS debugging and validation requires in-depth simulation models. A separation of initialization versus runtime models is required to optimize performance, improve simulation initialization accuracy, and the debugging environment. This paper describes the high level concepts and additional depth of modeling used to approach debugging and validating BIOS with simulation tools. Although context of the paper is BIOS development and validation, the concepts can be applied to simulation for any firmware project.