Design Con 2015
Welcome Guest Log In | Register

Mixed-Signal IP Design Challenges in 28-nm Process and Beyond

Authored on: Jul 1, 2012 by Brent Beacham et al

Technical Paper

0 0
More InfoLess Info
As process technologies continue to scale aggressively, it is becoming more challenging when developing high-quality, high-speed mixed-signal IP. Specifically, the 28-nm process poses some unique challenges not found in 65-nm and 40-nm technology processes. This paper discusses the low power requirements found in 28-nm processes and addresses issues associated with the aggressive scaling of the core supply voltages in these technology processes. It also focuses on restricted design rules and how they have created a paradigm shift in the way circuits are designed and laid out in 28-nm processes as well as describes techniques to maximize design and layout reuse.
View
 
0 comments
write a comment

Please Login

You will be redirected to the login page

×

Please Login

You will be redirected to the login page

×

Please Login

You will be redirected to the login page