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How to test high-speed memory with non-intrusive embedded instruments

Authored on: Jul 1, 2012 by Al Crouch

Technical Paper

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This white paper explains how non-intrusive software-driven embedded instruments can overcome many of the challenges of testing, validating and debugging high-speed memory buses such the DDR 3 or DDR4 (DDR3/4) buses, and others. The paper also describes the engineering tradeoffs involved with several non-intrusive test methods, including processor-controlled test (PCT), FPGA-controlled test (FCT), memory built-in self test (MBIST), boundary-scan test (BST) and functional test.

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