datasheets.com EBN.com EDN.com EETimes.com Embedded.com PlanetAnalog.com TechOnline.com  
Events
UBM Tech
UBM Tech

Noise Aware Obstructions in Hierarchically Partitioned Designs

Authored on: Jun 5, 2012 by Chetan Verma

Technical Paper

0 0
More InfoLess Info
In nanometer technology nodes one of the biggest design challenges emerging is signal integrity. A routing net running parallel to another net at a minimum separation gets capacitively coupled to the second net, thereby changing the parametric behavior of the second net. These effects lead to substantial increase in cycle time, especially in hierarchically partitioned designs. This paper discusses a technique to handle seamless merging of individual partitions to eliminate the capacitive coupling effects resulting from an eventual merging of these partitions in the design.
0 comments
write a comment

Please Login

You will be redirected to the login page

×

Please Login

You will be redirected to the login page

×

Please Login

You will be redirected to the login page