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Reducing CPU Loading through Data Buffering of ADCs Using DMA

Authored on: Mar 1, 2012 by Anu M D, Anup Mohan

Technical Paper

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Many embedded applications need to buffer large amounts of data from the ADC. However, the higher the sampling frequency, the greater the load on the CPU. Direct Memory Access (DMA) technology enables developers to perform data buffering of ADCs without CPU intervention, thus freeing the CPU to perform other tasks simultaneously. This paper will describe how to utilize the DMA controller in PSoC 3 and PSoC mixed-signal SoCs to buffer 8-, 16-, and 20-bit Delta Sigma ADC data, including how to overcome issues that arise when the DMA spoke width is less than the actual data width.
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