datasheets.com EBN.com EDN.com EETimes.com Embedded.com PlanetAnalog.com TechOnline.com  
Events
UBM Tech
UBM Tech
Welcome Guest Log In | Register

Efficient Redundancy Management for Die Area Reduction

Authored on: Mar 26, 2012 by Chetan Verma et al

Technical Paper

0 0
More InfoLess Info
Memory cuts, used with redundancy, comprise extra bits for repair. These bits may go unused once the production achieves the desired yield. If the number of the repairable memories is large, it may result in significant area wastage. This paper discusses a new proposal of lumping all the repair bits from multiple memories into a common pool of redundancy and proposes memory management architecture comprising a common pool of redundancy bits, which can be used to repair the faulty bits. The proposed memory architecture results in significant area and leakage power reduction.
View
 
0 comments
write a comment

Please Login

You will be redirected to the login page

×

Please Login

You will be redirected to the login page

×

Please Login

You will be redirected to the login page