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Why Simulation Matters: A Case for Riviera-PRO

Authored on: Aug 31, 2010 by Jaroslaw Kaczynski

Technical Paper

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RTL and gate-level Simulation is one of the oldest verification methods available in digital circuit design and maintains the status of the most popular and most reliable way of checking quality of your designs. This white paper uncovers key reasons why simulation is an important part of the design flow and shows most important features of modern simulators using Aldec Riviera-PRO.
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