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Understanding Clock Jitter Effects on Data Converter Performance and How to Minimize Them at the System Level

Authored on: Jul 1, 2010 by Manuel Mota

Technical Paper

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This white paper shows that the characteristics of the sampling clock may determine the system performance, and that their effect is independent of the data converter that is being used in the system rather being a function of the characteristics of the signal being processed by the system (for example, its frequency). It also identifies the main sources of this clock uncertainty (clock jitter effects), providing guidelines and rules for system engineers to understand and minimize such effects, thus assuring system performance requirements.

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Jimster Posted Jul 28, 2010

Multi devices in the same housing can cause multi clock jitter

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