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Interconnect Loss Budgeting for RocketIO Transceivers

Authored on: Nov 1, 2006 by Bill Hargin

Technical Paper

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For signals faster than 1 GHz, transmitted for distances longer than 10 inches, loss is the principal signal-integrity concern. A super-fast driver edge—like the 35 ps edge rate in Xilinx Virtex-II Pro X and Virtex-4 devices—will emerge from the end of the transmission path with reduced amplitude and a slower rise time.

This effect becomes particularly serious when the degraded rise time is comparable to the bit period of the signal. Inter-symbol interference (ISI) results when the shape of the received waveform becomes dependent on the prior combination of bits. This article will review the components of an interconnect loss budget, and explain a few things that you can do to mitigate loss effects.



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