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Shorter Verification Cycles at Lucent Technologies

Authored on: Jan 30, 2006 by Arun Thakkar

Technical Paper

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We still use HDL simulation in our projects here at Lucent, but ChipScope Pro tools have now become a vital part of our design and verification cycle, for all of our projects. This article explains that by catching problems in real time in the lab and by taking advantage of the reprogrammability of FPGAs, we are able to turnaround design problems in a matter of hours and get more out of our project time.

Reprinted with permission from Xcell Journal / Fourth Quarter 2005. Article © Xcell Journal.

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