Design Con 2015
Welcome Guest Log In | Register

Spartan-6 FPGA Connectivity Targeted Reference Design Performance

Authored on: Apr 22, 2010 by Sunita Jain

Technical Paper

0 0
More InfoLess Info

This white paper discusses the observed performance of the Spartan-6 FPGA Connectivity targeted reference design. The design uses PCI Express, Ethernet, and an integrated memory controller along with a packet DMA for moving data between system memory and the FPGA.

View
 
0 comments
write a comment

Please Login

You will be redirected to the login page

×

Please Login

You will be redirected to the login page

×

Please Login

You will be redirected to the login page