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Spacetime Architecture

Authored on: Mar 16, 2010

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Tabula Spacetime technology uses time as a third dimension to bring the density and performance of 3-D to programmable logic while maintaining a familiar design flow. The result is a new class of programmable devices called 3PLDs that combine ASIC capability with FPGA ease of use all at volume price points.

In a Spacetime device, the logic, memory, and interconnect resources are dynamically reconfigured up to eight times in each user cycle. The result is a 3-D device with eight folds. The Spacetime compiler automatically maps, places, and routes a user design into this 3-D device using standard VHDL/Verilog inputs and flows.

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