Design Con 2015
Welcome Guest Log In | Register

High Voltage CMOS Technologies for Robust System-on-Chip Design

Authored on: Feb 2, 2007 by Heimo Gensinger et al

Technical Paper

0 0
More InfoLess Info

In the past Smart Power System-on-Chip (SoC) products were almost exclusively designed on Bipolar-CMOS-DMOS (BCD) technologies. These products address applications as diverse as power management for mobile phones, motor drivers, printer head drivers, automotive bus transceivers and dataline drivers for high speed internet or Voice over IP (VoIP). The trend towards SoC design for lowering form factor and system cost has favored the use of low cost CMOS processes. High Voltage CMOS (HV-CMOS) processes have started to replace BCD processes in some applications that were previously dominated by BCD technologies. LCD display driver ICs supporting voltages up to 40V were the first large volume application for HV-CMOS processes. Other applications such as power management, bus transceivers, printer head drivers will soon employ HV-CMOS technologies. This is driven by HV-CMOS process and device architecture advances as well as progress in circuit modeling, Process Design Kits (PDKs), ESD structures and device reliability. HV-CMOS technologies have begun to offer designers equivalent functionality compared to typical BCD technologies without the additional process complexity. The modular HV-CMOS process architecture also offers easier scalability towards smaller geometries and straight-forward integration of embedded memories. The tradeoff is increased complexity of HV device layouts and PDK components.

View
 
0 comments
write a comment

Please Login

You will be redirected to the login page

×

Please Login

You will be redirected to the login page

×

Please Login

You will be redirected to the login page