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Solving the FPGA Power Consumption Problem

Authored on: Jan 31, 2007 by Herman Schmit

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Recent 90nm and 65nm FPGAs offer extended logic density and performance capabilities in a field programmable device. However, density and performance are paid for in exceedingly high power consumption, making them unacceptable solutions for portable systems and even for many high volume consumer electronics systems that will not tolerate excessive power/cooling costs. Structured ASIC vendors have attempted to provide solutions that combine the low design cost and low risk of an FPGA with low power and low unit cost approaching that of a cell-based ASIC. This paper explains how a Nextreme-based structured ASIC solution can reduce power consumption by more than 12x compared to FPGAs.

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