Implementation Techniques for DSP Algorithms on Parallel Architectures
The advances in technology have also resulted in parallel architectures, leading to manifold improvement in the performance. Advent of parallel architectures has forced us to go back and re-look at the algorithms from a parallelization perspective. The extent of parallelization of the algorithm, of course, depends on the kind of architecture we have available with us, as well as the algorithm itself.
In this paper, first we introduce some generic features of Digital Signal Processor (DSP) architectures. Then, we look at classification of parallel architectures, followed by a revisit to the generic features of DSP with a parallelization point of view. Some techniques for implementing the standard C algorithms on a parallel architecture will also be introduced. These are algorithms, which occur frequently in DSP applications. While parallelizing the DSP algorithms, a few points have to be kept in mind. We will take a look at some of them.
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