Assertion-Based Verification of ARM Core-Based Designs
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Assertion-based verification enables project teams to perform functional verification on system-on-chip (SoC) designs more thoroughly and predictably than traditional verification techniques, resulting in higher quality designs that meet aggressive time-to-market windows. Simulation with assertions improves the observability of designs, enabling bugs to be found faster and closer to the defect. Assertions also enable the deployment of functional formal verification, which improves the controllability of the design and can uncover corner-case scenarios that otherwise would never be exercised in simulation. With assertion-based verification, project teams can conquer the verification crisis and tape-out with confidence.
Reprinted in its entirety from ARM IQ Vol. 3, No. 5, 2005