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Hardware-assisted Verification for the Efficient Validation of Multiprocessor-based Designs

Authored on: Oct 31, 2008 by Hans Multhaup and Richard Pugh

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The use of multiple processors in SoC designs is gaining momentum as single-processor solutions hit their limits in terms of performance and bandwidth. As this trend continues to gain traction, the challenges faced in verifying these multiprocessor environments also increases, thus creating a need for new types of effective verification solutions.

In this article, a targeted approach is introduced using hardware-assisted verification. This approach provides designers with an accurate and high-performance solution for the efficient verification of multiple processor SoC designs.

Reprinted in its entirety from ARM IQ Vol. 7, No. 3, 2008

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