A Platform-based Low-Power Design Flow for an Advanced Mobile Applications Processor
Low-power has become a focal point for SoC designers. Advanced techniques such as multi-supply voltages, power gating, and dynamic voltage scaling are conceptually easy to understand, but difficult to implement in practice.
Faraday, a top-tier ASIC service provider, offers successful low-power SoC designs across multiple market segments, using a proven, platform-based low-power methodology incorporating the Common Power Format (CPF) as a fundamental enabling technology
Please disable any pop-up blockers for proper viewing of this paper.